Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2007-07-17
2007-07-17
Tran, Minhloan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S678000, C257S734000, C257SE23001, C257S023000, C257SE23023
Reexamination Certificate
active
10968053
ABSTRACT:
A semiconductor device is disclosed for preventing contamination on its bonding pads during mounting an electronic component, such as surface mount device (SMD). The semiconductor device includes a semiconductor substrate, a plurality of jointing material and at least an electronic component. A plurality of first bonding pads for wire-bonding and a plurality of second bonding pads for mounting the electronic component are formed on the active surface of the substrate. The substrate includes at least a dam is formed on the active surface to separate the first bonding pads from the second bonding pads. Preferably, the dam surrounds the second bonding pads. The jointing material is disposed on the second bonding pads for bonding the electronic component. Using the dam, there is no flux or tin-lead solder flowing onto the first bonding pads during reflowing the jointing material. In an embodiment, the electronic component can be mounted on the substrate in a wafer level.
REFERENCES:
patent: 4336551 (1982-06-01), Fujita et al.
patent: 4767892 (1988-08-01), Kobari
patent: 5075965 (1991-12-01), Carey et al.
patent: 5334422 (1994-08-01), Myers et al.
patent: 5425647 (1995-06-01), Mencik et al.
patent: 5930889 (1999-08-01), Klein
patent: 6049122 (2000-04-01), Yoneda
patent: 6689636 (2004-02-01), Liao et al.
patent: 6870248 (2005-03-01), Shibata
patent: 6927347 (2005-08-01), Yamaguchi et al.
patent: 6933617 (2005-08-01), Pierce
patent: 7009114 (2006-03-01), Urakawa et al.
patent: 2004/0040742 (2004-03-01), Ishizaki
patent: 459354 (2001-10-01), None
Advanced Semiconductor Engineering Inc.
Rodela Eduardo A.
Tran Minhloan
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