Pressurized interconnection system for semiconductor chips

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

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357 79, 361414, H01L 2316

Patent

active

050898809

ABSTRACT:
A multilayer pressure stack (microstack) has a plurality of layers formed of a material that may have a high time-dependent deformation factor and a plurality of segments formed in each layer. Each segment comprises a conductive material having a low time-dependent deformation factor and pressure is provided along a column of aligned segments to establish electrical interconnections between the segments in various layers. Interposers formed of non-conductive material may be provided in selected segments to form points of electrical isolation. The plurality of layers, or wafers, includes signal wafers and ground/voltage wafers. The signal wafers are formed of a low dielectric constant material to optimize the propagation velocity of signals traveling in signal traces connecting selected segments in the signal wafer. More than 100 wafers may be provided in a microstack and repairs and revisions of conductor routing are easily accomplished by substituting new wafers within the microstack.

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