Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With large area flexible electrodes in press contact with...
Reexamination Certificate
1998-09-11
2001-08-28
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With large area flexible electrodes in press contact with...
C257S727000
Reexamination Certificate
active
06281569
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a pressure-contact semiconductor in which insulated-gate semiconductor elements, such as IGBTs, are provided in a single package, and more particularly to a pressure-contact semiconductor device capable of improving the stability of switching operation.
2. Discussion of the Background
Pressure-contact semiconductor devices have been widely used for packages of semiconductor chips including insulated-gate elements. A pressure-contact semiconductor device has a gate terminal that penetrates the enclosure of the package and is electrically connected to the gate pad of each semiconductor chip.
In the pressure-contact semiconductor device, a plurality of semiconductor chips arranged in a plane are sandwiched and press-packed between a flat-plate emitter electrode around which an insulating enclosure is provided and a flat-plate corrector electrode, whereby the emitter electrode is made in pressure-contact with the semiconductor chips. A gate terminal is provided in such a manner that it penetrates the insulating enclosure. Inside the package (on the emitter electrode side), there are provided spring pins arranged in such a manner that each of the pins come into pressure-contact with the gate pad of each of the semiconductor chips. Leads including gate resistors connect the spring pins to the gate terminal in parallel.
In another known pressure-contact semiconductor device, semiconductor chips are arranged on a collector electrode plate, an annular insulating plate made of resin or ceramic is provided on the periphery of the collector electrode plate in such a manner that the insulating plate surrounds the semiconductor chips, and a thin layer of a gate wiring network evaporated over the insulating substrate is wire-bonded to the gate pad of each semiconductor chip. In this case, the semiconductor chips are sandwiched and press-packed between an emitter plate having protruded emitter electrode and the collector electrode plate.
The above-described pressure-contact semiconductor devices have the following problems. The problem which the configuration where the individual leads are connected to the gate terminal in parallel encounters is that the inductance components of the leads corrupt the current waveform of each chip as shown in
FIG. 1
, which makes the switching operation unstable.
Furthermore, the problem which the configuration where the gate wiring network is bonded to each semiconductor chip encounters is that the inductance components of the gate wiring network and bonding wires cannot be ignored and therefore the current oscillates, which makes the switching operation unstable. The instability becomes more significant as the number of chips increases. The bonding connection has a long-term reliability problem stemming from vibration resistance or aging. In addition, the configuration requires insulation for high voltages between the gate wiring network and the collector electrode plate to which high voltages are applied, which leads to an insulation problem.
BRIEF SUMMARY OF THE INVENTION
The object of the present invention is to provide a pressure-contact semiconductor device capable of reducing the inductance components of the gate leads, improving the stability of switching operation, and assuring a long-term reliability.
The gist of the invention is to decrease the inductance of the gate leads by providing a metal gate electrode plate to shorten the distance to the control gates of all the semiconductor chips.
According to a first aspect of the present invention, there is provided a pressure-contact semiconductor device comprising: a first main electrode plate; a second main electrode plate facing the first main electrode plate; an insulating enclosure for holding a periphery of each of the first and the second main electrode plate in such a manner that the first and the second main electrode plate face each other; a gate terminal provided in such a manner as to penetrate the enclosure; a gate electrode plate which is insulatively provided on the main surface of the first main electrode facing the second main electrode and which is electrically connected to the gate terminal; pressure-contact pins which are insulatively provided on the main surface of the first main electrode and which are electrically connected to the gate electrode plate; and semiconductor chips which are arranged in such a manner that the chips are sandwiched and pressed by the first and the second main electrode plate, and which each have a first and a second main electrode in pressure-contact with the first and the second main electrode plate, respectively, and a gate electrode with which the corresponding one of the pressure-contact pins comes into pressure-contact.
It is desirable that the gate electrode plate has an annular, planar shape that surrounds the semiconductor chips.
The gate electrode plate may have an annular, planar shape that is arranged among the semiconductor chips.
The gate electrode plate may have a planar shape that surrounds the semiconductor chips and is arranged among the semiconductor chips.
The first main electrode plate may have a network of grooves for forming projecting portions that come into contact with the semiconductor chips in a one-to-one correspondence and the gate electrode plate is arranged in the grooves in such a manner as to form a network.
It is desirable to further comprise at least one of an oscillation prevention resistor and an oscillation prevention magnetizer between the gate electrode plate and each of the pressure-contact pins.
The pressure-contact semiconductor device may further comprise diode chips provided in such a manner as to be mixed in the semiconductor chips, the diode chips being arranged in such a manner as to come into pressure-contact with the first and the second main electrode plate and each having a third and a fourth main electrode in pressure-contact with the first and the second main electrode plate, respectively.
It is desirable that the first main electrode plate has a network of grooves for forming projecting portions that come into contact with the semiconductor chips and the diode chips in a one-to-one correspondence and that the gate electrode plate is arranged in the grooves in such a manner as to form a network and is located closer to an outermost periphery than the diode chips.
It is desirable that the pressure-contact pins include springs so as to make pressure-contact with the gate electrode.
The gate electrode plate is made of a metal plate.
According to a second aspect of the present invention, there is provided a pressure-contact semiconductor device comprising: a semiconductor chip having a first and a second main surface, the first main surface having a first main electrode and a gate electrode and the second main surface having a second main electrode; a first main electrode plate having a projecting portion which comes into contact with the first main electrode; a second main electrode plate which comes into contact with the second main electrode; a pressure-contact pin which is insulatively provided adjacent to the projecting portion and presses the gate electrode; and a gate electrode plate which is insulatively provided adjacent to the first main electrode plate and to which the pressure-contact pin is electrically connected.
The gate electrode plate is made of a metal plate.
It is desirable that the pressure-contact pin include a spring to make pressure-contact with the gate electrode.
It is desirable to further comprise at least one of an oscillation prevention resistance and an oscillation prevention magnetizer between the gate electrode plate and the pressure-contact pin.
According to a third aspect of the present invention, there is provided a pressure-contact semiconductor device comprising: a semiconductor chip having a first and a second main surface, the first main surface having a first main electrode and a gate electrode and the second main surface having a second main electrode; a first main electrode plate havin
Chaudhuri Olik
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Wille Douglas A.
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