Prescaler system circuits

Details Prescaler system circuits Prescaler system circuits

1998-11-30

2000-08-08

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327208, 327210, 327211, 327212, H03B 1900

Patent

active

061007307

ABSTRACT:
A prescaler system (100) has a prescaler circuit (102) coupled to a divider (104), wherein the divider includes an improved dynamic flip flop divider (118). The divider (118) includes a TSPC nine-transistor D-flip-flop (10). The divider further includes a tenth transistor such as N channel device (41) having a source coupled to ground (43), a drain coupled to a junction between a drain of a P channel device (34) and a drain of another N channel device (37). The divider also includes an eleventh transistor such as N channel device (42) having a source coupled to ground and a drain coupled to a junction between the drain of a P channel device (35) and the drain of a N channel device (39), the junction providing a feedback signal to a N channel device (36), wherein the eleventh transistor further has a gate coupled to the output signal (/Q.sub.A).

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patent: 5321399 (1994-06-01), Notani et al.
patent: 5592114 (1997-01-01), Wu et al.
patent: 5828249 (1998-10-01), Sessions
Huang and Rogenmoser, Speed Optimization of Edge-Triggered CMOS Circuits for Gigahertz Single-Phase Clocks, IEEE Journal of Solid State Circuits, vol. 31, No. 3, Mar. 1996, pp. 456-465.

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