Preprogramming testing in a field programmable gate array

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

H04B 1700

Patent

active

056235011

ABSTRACT:
A field programmable gate array integrated circuit which has numerous features for testing prior to programming the antifuses in the integrated circuit is provided. The circuits used to program the antifuses are also used for much of the preprogramming testing. The functionality of continuous series transistors and latch logic blocks may be tested together with the continuity of their programmable connections. Programmable input/output buffer circuits and clock circuits which set the desired clock network paths may be tested with signals on a serial scan path which passes through the input/output buffer circuits and clock circuits. Process characterization tests without the requirement of high-speed test equipment are also provided.

REFERENCES:
patent: 3958110 (1976-05-01), Hong et al.
patent: 4380811 (1983-04-01), Gotze et al.
patent: 4495629 (1985-01-01), Zasio et al.
patent: 4609830 (1986-09-01), Yigal et al.
patent: 4642487 (1987-02-01), Carter
patent: 4689654 (1987-08-01), Brockman
patent: 4692923 (1987-09-01), Poeppelman
patent: 4739250 (1988-04-01), Tanizawa
patent: 4758745 (1988-07-01), Elgamal et al.
patent: 4786904 (1988-11-01), Graham, III et al.
patent: 4857774 (1989-08-01), El-Ayat et al.
patent: 4870302 (1989-09-01), Freeman
patent: 4873459 (1989-10-01), El Gamal et al.
patent: 4910417 (1990-03-01), El Gamel et al.
patent: 4935734 (1990-06-01), Austin
patent: 5001368 (1991-03-01), Cliff et al.
patent: 5015885 (1991-05-01), El Gamal et al.
patent: 5023485 (1991-06-01), Sweeney
patent: 5083083 (1992-01-01), El-Ayat et al.
patent: 5121394 (1992-06-01), Russell
patent: 5210759 (1993-05-01), De Witt et al.
patent: 5231637 (1993-07-01), Tanagawa
patent: 5309091 (1994-05-01), El-ayat et al.
patent: 5365165 (1994-11-01), El-Aayat et al.
patent: 5373510 (1994-12-01), Ha
patent: 5532441 (1995-07-01), El-Ayat et al.
Greene et al, "Antifuse Field Programmable Gate Arrays", Proceedings of the IEEE, vol. 81 Iss. 7, Jul. 1993, pp. 1042-1056.
Goldberg et al, "The Structure of Complete Test Sets for Programmable Logic Arrays", European Test Conf., 1993 Pro., pp. 513-514.
Liu et al, "A New Low Overhead Design for Testability of Programmable Logic Arrays", Circuits & Systems, 1991 IEEE Int. Sym., pp. 1972-1975.
El Gamal et al, "An Architecture For Electrically Configurable Gate Arrays", IEEE Journal of Solid State Circuits, vol. 24, Iss. 2 Apr. 1989, pp. 394-398

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Preprogramming testing in a field programmable gate array does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Preprogramming testing in a field programmable gate array, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Preprogramming testing in a field programmable gate array will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-346856

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.