Preprocessor and related frequency translator

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

Reexamination Certificate

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Details

C455S310000

Reexamination Certificate

active

06393266

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The field of the invention relates generally to wireless communication receivers, and more specifically to a preprocessing system for frequency translator applications and a related frequency translator which together form the core of a direct conversion receiver.
2. Background
Modern electronic communications systems increase the speed, accuracy, ease, expense, and efficiency of transmitting voice, video and data information. One example of a modern electronic communication system is a wireless communication system designed to transmit information over a wireless communication channel using high frequency carrier signals, most often at radio frequency.
One ongoing trend in wireless communication systems is a reduction in size, power consumption and cost of the wireless handsets. For example, since 1992, handsets operating under the GSM (Global System for Mobile Communication) standard have undergone a transition in handset volume (size) from 500 cc to 150 cc and a reduction in weight from 500 grams to 200 grams. In the same period of time, the user's price for a handset operating under the GSM standard has fallen more than 70%.
In the personal wireless communication arena, these reductions in size, weight, and cost are offered to prospective consumers as incentives to purchase a particular brand of phone or type of service. Hence, the manufacturers and service providers with the smallest, lightest and least expensive phones enjoy the best opportunity for marked increases in sales, subscribers and profits. Thus, the trend towards miniaturization and cost efficiency continues.
FIG. 1
illustrates the front end of a modern wireless communication receiver as might be found in handsets of the prior art. One aspect of the receiver performs the task of de-modulation, that is, down conversion of the channel from the carrier frequency (F
RF
), so that the base band signal, at frequency F
bb
, may be provided to a listener or data processing device.
Wireless handsets include an antenna (not shown) designed to capture radio signals. Connected to the output of the antenna is a RF (radio frequency) input
200
that in turn connects to a first frequency translator
202
, which in one implementation, is a mixer.
A local oscillator
204
also connects to the first frequency translator
202
to provide a mixing signal. In systems of the prior art, the local oscillator frequency is set at F
x
to obtain a desired output from the first frequency translator
202
.
The first frequency translator
202
multiples the RF signal with the local oscillator signal in a process described below in greater detail to yield a signal on a line
206
at a frequency F
1
which is intermediate, that is, between the carrier frequency and base band.
Filter and amplifier system
208
connects to the output of the first frequency translator
202
to filter unwanted blocking signals and amplify the received signal for further processing.
A second frequency translator
210
connects to the output of filter amplifier system
208
to further reduce the frequency of the received signal and thereby isolate the base band signal. A second local oscillator
212
connects to the second frequency translator
210
. An output line
214
carries the demodulated signal at base band frequency F
bb
.
Local oscillators of the prior art such as local oscillators
204
,
212
generally output two signals both of which generally resemble a sine wave but are 180 degrees out of phase with respect to each other.
FIG. 2
illustrates the 180° degree phase shift relationship between the two signals. Of importance is the transition where the value of a first signal
216
becomes greater than or less than the value of a second signal
218
. These transitions define points at which one implementation of frequency translators
202
and
214
switch polarity. For two signals 180° degrees out of phase, these transitions occur at points such as
219
.
In the receiver of
FIG. 2
, the filter and amplifier systems
208
require off chip space and resources, consume valuable power, and add weight and expense to the demodulating circuitry. In addition, the use of two frequency translators, mixers
202
and
210
, is redundant and expensive.
Therefore, a need exists for a receiver design that reduces the expense, size, weight, complexity, and power consumption of prior art receivers.
Other objects and advantages are set forth in the description that follows, or will be apparent to those of ordinary skill in the art.
3. Related Applications
This application is related to a co-pending patent application Ser. No. 09/260,919 entitled “DIRECT CONVERSION RECEIVER”, which is owned in common by the assignee hereof, and is being filed on even date herewith. This application is hereby fully incorporated by reference herein as though set forth in full.
SUMMARY OF THE INVENTION
In accordance with the purpose of the invention as broadly described herein, there is provided a direct conversion receiver system which includes a preprocessor and frequency translator. In one embodiment, the preprocessor receives a plurality of split-phase signals from a local oscillator, and, responsive thereto, outputs a plurality signals having preferred characteristics to improve the switching action in the frequency translator and to reduce the effects of leakage between the inputs of the frequency translator. The frequency translator is configured to operate in conjunction with the preprocessor. In one implementation, the frequency translator is a modified Gilbert mixer configured to switch polarity at twice the local oscillator frequency. In this implementation, the preprocessor is configured to provide signals to the local oscillator (LO) inputs of the mixer which are at ½ of the radio frequency (RF) carrier frequency.
A first aspect of the invention comprises the receiver system. A second aspect comprises the preprocessor. A third aspect comprises the frequency translator. It is contemplated that the invention comprises the foregoing aspects, singly or in combination.
In one embodiment, the preprocessor connects to the output of a phase-split local oscillator and is coupled to the input of a mixer or similar frequency translation device. In this embodiment, the output of the preprocessor is provided to the input of the mixer at a frequency which is about ½ the frequency of the received signal. This signal is multiplied with the received radio signal to downconvert the channel, and recover the baseband signal. The significant improvement in the switching of the mixer provided by the preprocessor allows the ½ LO mixer to be commercially viable.
The output of the preprocessor in one embodiment comprises a plurality of phase-shifted signals. In one implementation, the signals are phase-shifted versions of each others, and are substantially symmetrical about a DC offset. In addition, only one of the plurality of output signals is in a predefined state at a time, the predefined state being such as to actuate the switching action in the mixer. Finally, it is generally preferred that each signal have steep or rapid transitions at the points which define the transition points of the mixer.
In one embodiment, the preprocessor comprises a first and second comparator, each configured to receive two input signals from a four output local oscillator. The comparators compare the values of the two signals relative to one another, and provide as an output a positive or negative value based upon which signal input is greater. In one embodiment, the comparators comprise two output comparators while, in another embodiment, the comparators are single output comparators.
The output of the comparators connects to a summing junction or summing unit wherein the signals are added or subtracted in various combinations to achieve a desired plurality of output signals. One embodiment also includes a buffer circuit connected to the preprocessor output for impedance transformation.
In one embodiment, the input to the preprocessor c

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