Patent
1992-07-30
1994-09-06
Shaw, Dale M.
G06F 1202
Patent
active
053455606
ABSTRACT:
A prefetch buffer adapted to be installed between a cache memory and a main memory in a computer system having a CPU. The prefetch buffer includes a buffer storage having at least one entry for storing prefetched data and an address tag, which is to be used for searching the data, as a pair; a data searcher for searching, from the data stored in the buffer storage, for data having an address requested by the CPU; and an address estimator for determining an address of data to be prefetched next from the main memory, based on the address requested by the CPU and also on a history of the addresses of data prefetched in the past from the main memory; and an address generator for generating an address of data to be prefetched from the main memory. With this arrangement, it is possible to improve the hit ratio of the prefetch buffer regardless of the direction in which the access address varies.
REFERENCES:
patent: 4714994 (1987-12-01), Oklobdzija et al.
patent: 4943908 (1990-07-01), Emma et al.
Hirose Kenji
Kurosawa Kenichi
Miura Shuuichi
Nakamikawa Tetsuaki
Kim Sang Hui
Shaw Dale M.
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