Amplifiers – Hum or noise or distortion bucking introduced into signal...
Reexamination Certificate
2000-06-15
2001-10-23
Mottola, Steven J. (Department: 2817)
Amplifiers
Hum or noise or distortion bucking introduced into signal...
C330S294000, C330S302000
Reexamination Certificate
active
06307436
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an electronic circuit (predistortion type linearizer) for linearizing the nonlinear responses of amplifiers, achieving low distortion, wide-dynamic range amplification particularly suitable for cellular handsets application.
2. Description of the Related Art
Recent advances in digital cellular systems such as IS-95 or wide-band CDMA (W-CDMA) have demanded microwave amplifiers that can operate with low distortion and high efficiency over a wide output power range for cellular handsets application. To achieve low distortion amplification, transmitter amplifiers usually operate at power backoff, resulting in reduced efficiency of operation. One of the viable options to reduce distortion is to linearize the nonlinear responses of amplifiers using linearization scheme. Various types of amplifier linearization techniques, such as feedforward, predistortion and feedback, have been disclosed in “Feedforward linearization of 950 MHz amplifiers,” by R. D. Stewart et al., IEE Proceedings-H, vol. 135, no. 5, pp. 347-350, October 1988; U.S. Pat. No. 5,850,162 by Danielsons; “An automatically controlled predistorter for multilevel quadrature amplitude modulation,” by J. Namiki, IEEE Trans. Commun., vol. COM-31, no. 5, pp. 707-712, May 1983; U.S. Pat. No. 5,038,113 by Katz et al.; U.S. Pat. No. 4,465,980 by Huang et al.; U.S. Pat. No. 5,523,716 by Grebliunas et al.; “An MMAC C-Band FET feedback power amplifier,” by A. K. Ezzeddine et al., IEEE Trans. Microwave Theory Tech., vol. MTT-38, no. 4, pp. 350-357, April 1990; “An MMIC linearized amplifier using active feedback,” by J. C. Pedro et al., 1993 IEEE MTT-S Dig., pp. 95-98; U.S. Pat. No. 5,886,572 by Myers et al.; U.S. Pat. No. 5,821,814 by Katayama et al., but the requirement of small-sized handsets have restricted the number of linearization schemes that are applicable to handset amplifiers. Linearization schemes such as feedback and predistortion satisfy such requirement. However, feedback technique is not commonly used due to the possibility of endangering the stability of the amplifier to be linearized, and most applications are therefore based on the predistortion technique.
In the art of predistorter design applicable to handset amplifier linearization, a technique referred as common-source FET linearizer with source inductor was reported by M. Nakayama et al. in 1995 IEEE MTT-S digest, pp. 1451-1454. The schematic of this technique is shown in FIG.
1
. The predistorter
604
consists of a common-source configured FET
600
with a source inductor
601
. An input matching network
602
is connected to the gate (G) of the FET
600
and an output matching network
603
is connected to the drain (D) of the FET
600
. The characteristics of gain and phase are function of the source inductor
601
with respect to input power. The predistorter
604
is cascaded to the input of the amplifier
605
to linearize its nonlinear effect. Another alternative form of predistorter was reported by K. Yamauchi et al. in 1996 MTT-S digest, pp. 831-834. This technique will be referred to as series diode linearizer. The schematic of this technique is shown in FIG.
2
. The predistorter
707
employs a series diode
700
which is biased by a DC voltage source
701
via an inductor choke
703
. Inductor
705
provides grounding for the DC voltage source
701
. Capacitor
702
and capacitor
706
are used as input and output DC block respectively. Capacitor
704
is added to ensure a negative phase deviation of the diode linearizer with the increase in input power. The amplitude and phase characteristics of the diode linearizer
707
can be changed by adjusting the biasing voltage
701
. The nonlinear effect of the amplifier
708
is linearized by the predistorter
707
. A typical third-order intermodulation (IM3) response of such a linearized amplifier is shown in FIG.
3
. The IM3 distortion level is improved over a limited range usually at higher output power region. At low output power, the IM3 level of the linearized amplifier is worsen compared to the case without the predistorter.
To achieve high efficiency operation over a wide output power range, amplifiers are commonly subjected to bias control. This technique can be combined with a predistorter to improve the efficiency of an amplifier as well as distortion level.
FIG. 4
shows the schematic of such amplifier. The predistorter
800
, having the form of
606
or
707
shown in
FIG. 1
or
2
, is connected in cascade to the amplifier
801
. The bias of the amplifier
801
is controlled by the DC-DC converter
802
which has a DC voltage source
803
. The DC-DC converter
802
changes the bias level of the amplifier
801
according to the output power level, enabling efficiency improvement. The incorporation of the predistorter
800
compensates the nonlinear effect of the amplifier
801
to reduce distortion at the output under high output power region.
While prior art method employing common-source FET
600
with source inductor
601
as a predistortion type linearizer
604
, the large size of the source inductor
601
could prevent the realization of a miniaturized linearizer. The diode type linearizer
707
has the advantage of smaller size, but, similar to the common source FET linearizer
604
, the amplitude and phase responses are dependent parameters on each other. Therefore it is difficult to tune the amplitude and phase responses of the linearizer independently to match that of a nonlinear amplifier.
In addition, the distortion improvement by incorporating a predistortion type linearizer to a nonlinear amplifier is usually restricted to a limited output power region. Outside that region, the distortion level is usually degraded compared to the case before linearization due to difficulty to match the gain and phase characteristics between the predistorter and amplifier over a wide power range. This could limit the dynamic range of an amplifier for application in systems such as IS-95 or W-CDMA. Furthermore, due to the use of a fix control voltage on a predistortion type linearizer, the response of such linearizer cannot dynamically track and match that of an amplifier implementing dynamic bias control for wide dynamic range, high efficiency operation, and thus degrades the overall distortion improvement.
The objective of this invention is to achieve an independent control on the phase and amplitude characteristics of a predistortion type linearizer. Such linearizer should have positive gain deviation and negative phase deviation with an increase in input power for compensating the gain compression and positive phase deviation characteristics of solid state, such as FET or HBT-based, amplifiers. The linearizer should also attain low loss and small size, which may be applied to linearize nonlinear amplifiers used in cellular handsets. Another objective of this invention is to develop control schemes such that amplifiers, incorporating the predistortion type linearizer, can achieve low distortion, high efficiency over a wide dynamic range of output power.
SUMMARY OF THE INVENTION
In claim
1
, a predistortion type linearizer is invented to linearize the nonlinear responses of amplifiers. The linearizer has a small size suitable for MMIC (Microwave Monolithic IC) implementation. The linearizer is based on a common gate FET configuration, with a resonant circuit connected between drain and source terminals which minimizes the effect of the intrinsic capacitance of the FET on phase characteristic, and also reduces loss of the linearizer. The degree of negative phase deviation of the predistorter is determined by the gate inductor. Gate control voltage is utilized to adjust the amplitude characteristic of the predistorter. Inductors are connected between drain terminal of FET and ground, and between source terminal of FET and ground in order to achieve a negative phase deviation with an increase in input power. The capacitors connected between input and drain terminal of FET, and between output and source terminal
Mottola Steven J.
NEC Corporation
Young & Thompson
LandOfFree
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