Patent
1986-01-17
1987-02-17
Larkins, William D.
357 40, 357 45, H01L 2978, H01L 2704
Patent
active
046443827
ABSTRACT:
A prediffused integrated circuit having rows of basic cells on a substrate. Each basic cell includes two MOS transistors connected in series through a common drain or source electrode, each transistor having a separate gate. All basic cells in a row are the same type while adjacent rows alternate between p-type and n-type.
REFERENCES:
patent: 3943551 (1976-03-01), Skorup
patent: 4249193 (1981-02-01), Balyoz et al.
patent: 4412237 (1983-10-01), Matsumura et al.
Noto et al.; I.E.E.E. Circuits and Systems Magazine; vol. 3; No. 3; 9-1981; pp. 14-18.
Athenes Claude
Audrix Jean C.
Charransol Pierre
Larkins William D.
Thomson-CSF - Telephone
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