Predicate selection in bit-level compositional transformations

Details Predicate selection in bit-level compositional transformations Predicate selection in bit-level compositional transformations

2008-05-30

2011-10-11

Breene, John E (Department: 2162)

Data processing: database and file management or data structures

Database and file access

Record, file, and data search and comparisons

C707S764000, C707S770000, C716S051000, C716S106000, C716S111000

Reexamination Certificate

active

08037085

ABSTRACT:
A method for performing verification includes selecting a first set containing a seed register and adding to a second set a result of a subtraction of a fanout of the first set from a fanin of the first set. A third set is rendered equal to a result of a subtraction of a fanin of the second set from a fanout of the second set, and whether a combination of the first set and the third set is equivalent to the first set is determined. In response to determining that the combination of the first set and the second set is not equivalent to the first set, a min-cut of the first set and the second set containing a minimal set of predicates between a first component and the logic to which the component fans out, wherein the logic is bordered by the second set is returned.

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