Preconditioning of defective and redundant columns in a...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185110, C365S185220, C365S185240, C365S185290, C365S185330, C365S200000, C711S104000

Reexamination Certificate

active

07145800

ABSTRACT:
A redundant column is mapped to a defective or over-erased column in the memory array. When an erase command occurs, both the redundant column and the defective or over-erased column are preconditioned by preprogramming them. The defective or over-erased column is preprogrammed and verified a predetermined number of times or until the verification passes. The redundant and defective or over-erased columns are then erased with the rest of the memory block.

REFERENCES:
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patent: 5594689 (1997-01-01), Kato
patent: 5774396 (1998-06-01), Lee
patent: 6198662 (2001-03-01), Chen
patent: 6249459 (2001-06-01), Chen
patent: 6279070 (2001-08-01), Jeong et al.
patent: 6381174 (2002-04-01), Roohparvar et al.
patent: 6407947 (2002-06-01), Ahn
patent: 6469932 (2002-10-01), Roohparvar

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