Preconditional quiescent current testing of a semiconductor...

Details Preconditional quiescent current testing of a semiconductor... Preconditional quiescent current testing of a semiconductor...

2005-05-17

2005-05-17

Nguyen, Vincent Q. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010, C714S724000, C714S030000

Reexamination Certificate

active

06894503

ABSTRACT:
A method for testing a semiconductor device is included where sleep mode commands associated with the semiconductor device are generated. The semiconductor device includes logic blocks, where a sleep mode command sets a logic block in a sleep mode. A sleep mode sequence associated with the logic blocks of the semiconductor device is determined. The sleep mode commands are executed according to the sleep mode sequence by applying the sleep mode commands to the logic blocks. A quiescent current corresponding to the semiconductor device is measured in order to test the semiconductor device.

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patent: 6765414 (2004-07-01), Keshavarzi et al.
Rochit Rajsuman, “Design-for-Iddq-Testing for Embedded Cores Based System-on-a-Chip”, O-8186-9191-3/98, © 1998 IEEE, pp. 69-73.
Digest of Papers, IEEE International Workshop on IDDQ Testing, 1995, edited by Y. K. Malaiya and A. P. Jayasumana, IEEE Computer Society Technical Committee on Test Technology, Washington, D.C., 5 pages, Oct. 25-26, 1995.

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