Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2007-05-22
2007-05-22
Patel, Jay K. (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S354000, C341S131000, C342S357490, C342S450000, C327S231000, C327S270000, C327S105000, C708S313000, C348S592000, C368S113000
Reexamination Certificate
active
10268022
ABSTRACT:
A precision timing generator and an associate method provide a precise clock signal based on a reference clock signal. Using the reference clock signal in a phase locked loop or delay locked loop, a number of clock signals of equal frequency are generated separated consecutively by a known phase. Two of these clock signals of consecutive phases are selected for interpolation for higher precision according to predetermined weights. The resulting interpolated clock signal has a phase offset that is intermediate between the selected clock signals in proportion to the predetermined weights. In one implementation, a second interpolated clock signal is created by selecting and weighting a second group of clock signals using independent selection and weights. The two interpolated clock signals are then combined by logic operations to provide a precise clock signal of predetermined duty cycle and phase.
REFERENCES:
patent: 4389664 (1983-06-01), Robitzsch
patent: 5541864 (1996-07-01), Van Bavel et al.
patent: 5793709 (1998-08-01), Carley
patent: 6016113 (2000-01-01), Binder
patent: 6094082 (2000-07-01), Gaudet
patent: 6121808 (2000-09-01), Gaudet
patent: 6300903 (2001-10-01), Richards et al.
patent: 6396313 (2002-05-01), Sheen
patent: 6430208 (2002-08-01), Fullerton et al.
patent: 6590528 (2003-07-01), DeWulf
patent: 2003/0108136 (2003-06-01), Wang et al.
Christiansen (“An integrated CMOS 0.15 ns digital timing generator for TDC's and clock distribution systems”; IEEE Transactions on Nuclear Science; vol. 42, Issue 4, Part 1-2; Aug. 1995; pp. 753-757).
Rodrigues (“Applying Affine Transformation to Images”; Oct. 2001; pp. 1-5; http://www.awprofessional.com/articles/article.asp?p=23667&rl=1 ).
Bazes (“An Intepolating Clock Syntheizer”; IEEE Journal of Solid-State Circuits; vol. 31, No. 9; Sep. 1996; pp. 1295-1301.
Hodges et al. (“Design of PLL-Based Clock Generation Circuits”; IEEE Journal of Solid-State Circuits; vol. Sc-22, No. 2; Sep. 1987; pp. 255-261.
Win, M., et al., “Ultra-Wide Bandwidth Time-Hopping Spread-Spectrum Impulse Radio for Wireless Multiple-Access Communications,”IEEE Transactions on Communications, vol. 48, No. 4, Apr. 2000, pp. 679-691.
Bitzmo, Inc.
Kwok Edward C.
MacPherson Kwok & Chen & Heid LLP
Patel Jay K.
Pathak Sudhanshu C.
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