Precision oscillator circuits and methods with switched...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

Reexamination Certificate

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C331S016000, C331S017000

Reexamination Certificate

active

06342817

ABSTRACT:

BACKGROUND OF THE INVENTION
In the design of electronic circuits, periodic waveform signals are often required for purposes including clocked computer and control circuits, communication circuits requiring pulses, and test and measurement circuits. The present invention relates to circuits which supply periodic waveform signals. More specifically, the present invention relates to using a switched-capacitor feedback loop to bias a variable oscillator so that it produces an accurate and stable periodic waveform.
There are a few popular options available for generating a periodic waveform. Low-cost RC (resistor-capacitor) oscillators can be built using discrete components such as comparators, resistors, and capacitors, or using simple integrated circuits such as the industry standard 555 timer in conjunction with several discrete components. These solutions are bulky and inaccurate, especially at frequencies greater than a few hundred kilohertz.
On the other hand, accurate oscillators may be built using ceramic resonators or crystals as a stable frequency element. However, these circuits are also bulky and tend to be more expensive than RC oscillators. It is difficult or impossible to vary their frequency, as they are usually available only in preset frequencies. A phase-locked loop circuit may be used to generate a range of frequencies at increased cost. There is a need for a circuit that combines the frequency stability of a ceramic resonator with the low-cost, flexibility, and ease-of-use of an RC oscillator, while requiring less space than either.
A simple RC oscillator circuit will suffer from poor initial accuracy and stability over supply and temperature. In addition, these circuits usually have poor linearity when operated over a large—e.g., 10:1—frequency range.
There are two ways to improve the accuracy. Open-loop techniques involve using very fast comparators, accurate voltage references, and linearity correction circuits that attempt to predict and correct for the inherent non-linearity of the basic circuit. The performance of such a circuit is fundamentally limited by the number of circuit elements, each contributing a certain amount of error to the oscillation frequency.
Closed-loop, or feedback, techniques place the basic oscillator circuit inside a high-gain feedback loop that suppresses the oscillator's inaccuracies. The accuracy is substantially determined by the feedback path, which may consist of much fewer devices. Feedback techniques, often using op-amps are popular because they change the critical components from one part of the circuit to another of the designer's choosing. In the case of an RC oscillator, the accuracy of the basic oscillator circuit can be neglected. Proper design of the feedback and input circuits will results in an overall design that can be much more accurate, stable, and linear than possible using open-loop techniques.
The feedback circuit must convert frequency into another type of signal for comparison against an accurate reference. A switched-capacitor is an excellent candidate for use in a feedback circuit because it can act as a “frequency-controlled resistor” with value R=1/(f*C). Placing a controlled voltage (V
REF
) across the switched-capacitor allows it to generate an average current that is proportional to frequency (I
FREQ
). This current may be subtracted from a reference current (I
REF
) to generate an error current. This error current is used to adjust the oscillator frequency by changing its input (either voltage or current). If the feedback loop can force the error current to zero, then the frequency will be equal to I
REF
/(C*V
REF
).
One way to process the error current is to integrate it across a second capacitor, creating a voltage that may be used as input to the oscillator. In switched-capacitor circuits, it is common to implement an integrator with an op-amp that places the second capacitor in a negative feedback loop between the op-amp output and its negative input. Because an op-amp forces the voltage between its inputs to near zero, this circuit allows the switched-capacitor voltage to be set by applying the proper voltage at the op-amp's positive input.
The switched-capacitor current will not be continuous, but will instead transfer packets of charge each clock cycle. While its average current is I
FREQ
=f*C*V
REF
, the charge transfer occurs at discrete points in time unlike a true resistor. Therefore, the voltage at the output of the op-amp will be a sawtooth waveform, with near-instantaneous jumps in voltage once each clock cycle, and a continuous ramp due to I
REF
in between.
A switched capacitor feedback loop used in conjunction with an integrating amplifier circuit is described in T. R. Viswanathan et al., “Switched-Capacitor Frequency Control Loop,” IEEE J. of Solid-State Circuits, 17(4):774-778 (August 1982) (“Viswanathan”).
FIG. 1
shows the architecture of the switched capacitor frequency control loop described by Viswanathan. An oscillator circuit
100
includes a voltage reference
130
, which is used to supply a current through a resistor
112
(R) to an inverting input of an amplifier circuit
120
. Amplifier circuit
120
includes an inverting feedback loop with a capacitor
116
acting as an integrator.
A two-phase clock generator
124
provides clock signal
126
and clock signal
128
which exhibit a 180° phase difference from each other. When clock signal
126
is high, switches
104
and
106
are closed; when clock signal
126
is low, switches
104
and
106
are open. When clock signal
128
is high, switches
102
and
110
are closed; when clock signal
128
is low, switches
102
and
110
are open. The overall effect of switches
126
and
128
is to alternately couple and de-couple a switched capacitor
108
(C) from amplifier circuit
120
and voltage reference
130
.
The coupling and de-coupling of switched capacitor
108
removes a charge packet from the inverting input of amplifier circuit
120
every clock cycle. The combination of the current flowing through resistor
112
and the periodic switching of switched capacitor
108
provides a signal at the output of amplifier circuit
120
resembling a sawtooth waveform. At a certain frequency given by f=1/(R*C), the amount of charge removed in a single cycle by the switched capacitor is equal to the accumulated charge added by the resistor in the same amount of time. If the switched-capacitor is operated at that frequency, the average value of the sawtooth waveform at the op-amp output will not change over time. At higher frequencies, the average switched-capacitor current is greater and the average value of the op-amp output rises. Likewise, at lower frequencies, the average value of the op-amp output voltage falls.
FIG. 1
also shows a loop filter
122
which is coupled between amplifier circuit
120
and a suitable VCO (Voltage Controlled Oscillator)
118
. Loop filter
122
averages the output of the integrating amplifier for use as input to VCO
118
. By averaging the output, the loop filer
122
determines the frequency of the periodic waveform VCO
118
produces. Two-phase clock generator
124
generates the switched-capacitor clocks
126
and
128
based on the VCO output. This completes the feedback loop, as the switched-capacitor current is determined by the VCO frequency.
Viswanathan further acknowledges that resistor
112
may be replaced by any suitable current source, creating a current-to-frequency converter. Similarly, applying two different voltage references to the resistor and switched capacitor causes an analog-to-digital conversion of voltages based on time or frequency measurement.
An alternative architecture with a switched capacitor loop is described by Asad A. Abidi, “Linearization of Voltage-Controlled Oscillators Using Switched-Capacitor Feedback,” IEEE J. of Solid-State Circuits, 22(3):494-496 (June 1987) (“Abidi”) which is shown in FIG.
2
.
An oscillator circuit
200
shown in
FIG. 2
includes an amplifier circuit
208
configured in an inverting integrating a

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