Precision FET control loop

Details Precision FET control loop Precision FET control loop

1990-07-02

1992-12-15

Dwyer, James L.

Telephonic communications

Supervisory or control line signaling

Using line or loop condition detection

379385, 379344, 379394, 307544, H04B 158

Patent

active

051724090

ABSTRACT:
A telephone line card circuit includes an operational amplifier circuit having first and second inputs and an output. A field-effect transistor circuit has first, second and control electrodes, the control electrode is coupled to the output of the operational amplifier circuit, the first electrode is coupled to the TIP/RING terminal, and the second electrode is coupled to the second input of the operational amplifier circuit. A first resistor is coupled between the TIP/RING terminal and the first input of the operational amplifier circuit. A second resistor is coupled between the first input of the operational amplifier circuit and a terminal of the circuit whereby the terminal of the circuit is typically coupled to a supply voltage terminal. A third resistor is coupled between the second input of the operational amplifier circuit and the terminal of the circuit such that the precision of the ratio of the resistance of the field-effect transistor circuit to the third resistor is determined by the precision of the ratio of the first resistor to the second resistor.

REFERENCES:
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patent: 4306122 (1981-12-01), Nijman et al.
patent: 4314106 (1982-02-01), Bakker
patent: 4424498 (1984-01-01), Murray et al.
patent: 4604535 (1986-08-01), Sasayama et al.
patent: 4742540 (1988-05-01), Schingh
patent: 4766608 (1988-08-01), Tin
patent: 4935959 (1990-06-01), Markovic et al.
patent: 4942603 (1990-07-01), Chambers

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