Precision digital sampler

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

328 56, 328 63, 307352, H03K 5153, H03K 5159

Patent

active

044437668

ABSTRACT:
A precision digital sampler utilizes a sample rate clock providing pulses driving a tapped delay line where the total delay equals the Pulse Repetition Interval (PRI) of the sample clock. The outputs of the tapped delay line are tied to a buffer register having a storage cell for each delay line tap. The data from the delay line is stored in the register on receipt of a command signal designated "sample initiate command". In storing the outputs of the delay line, the state of the sample clock is known to the resolution of the taps. A decoder studies the states and the time for locating the leading edge of the sample clock is calculated. The calculated time is used by a control switching circuit to determine which tap should be enabled. The leading edge of the sample clock is thus enabled at the resolution of the delay line taps.

REFERENCES:
patent: 3614619 (1971-10-01), Huntsinger et al.
patent: 3851261 (1974-11-01), Geiger
patent: 3879661 (1975-04-01), Collins
patent: 3909716 (1975-09-01), Diekers

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