Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-10-13
2002-02-05
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S541000, C323S315000
Reexamination Certificate
active
06344769
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to current sources. More particularly, the present invention relates to a high-current, high-speed, high-accuracy current driver for differentially switching accurate currents onto different loads.
2. Description of the Related Art
Accurate current sources are needed for a variety of operations, including to provide current for driving transformers in 100BaseTX networks and for use in digital-to-analog converters. In the past, current-mirror cascode type current sources have been used.
One type of conventional current source is the regulated cascode current mirror.
FIG. 1
is a circuit diagram of a conventional regulated cascode current mirror.
As shown in
FIG. 1
, the current mirror has an input node
1
, a first mirror transistor
3
, a second mirror transistor
5
, an output transistor
7
, a voltage amplifier
9
, and an output node
11
. The voltage amplifier
9
is preferably a differential amplifier. The first mirror transistor
3
has its drain and gate connected to the input node
1
and its source connected to ground. The second mirror transistor
5
has its gate connected to the gate of the first mirror transistor
5
, its drain connected to the source of the output transistor
7
, and its source connected to ground. The output transistor
7
has its gate connected to the output of the voltage amplifier
9
, its source connected to the drain of the second transistor
5
, and its drain connected to the output node
11
. The voltage amplifier
9
has its non-inverting input connected to a reference voltage V
ref
, and its inverting input connected to the source of the output transistor
7
. The input node receives an input current I
IN
, and the output node
11
provides an output current I
OUT
.
The operation of the regulated cascode current mirror shown in
FIG. 1
is described below. An input current I
IN
is initially supplied to the input node
1
. Because the gates of both mirror transistors
3
and
5
are connected to the input node
1
, both transistors
3
and
5
are turned on when it receives this current input. The gate-to-source voltage for the two mirror transistors
3
and
5
is identical, since the two have a common gate voltage and a common source voltage (both sources being grounded). In addition, in the first mirror transistor
3
, the drain-to-source voltage is identical with its gate-to-source voltage, since the gate and drain are connected together.
The current flowing through the second mirror transistor will depend upon how the drain-to-source voltage of the second mirror transistor
5
compares with that of the first mirror transistor
3
. If the two drain-to-source voltages are identical, then the currents passing through the first and second mirror transistors
3
and
5
will be the same. As the drain-to-source voltage of the second mirror transistor
5
increases, so too does the current passing through it, and the gain of the circuit is increased. Likewise, as the drain-to-source voltage of the second mirror transistor
5
decreases, the current passing through it also decreases and the gain of the circuit is reduced.
The output transistor
7
and the voltage amplifier
9
then serve to regulate the output of the current mirror formed by the first and second mirror transistors
3
and through the use of a feedback loop, as is well understood in the art.
The current mirror of
FIG. 1
only allows for a single output current, however. In many applications, e.g. digital-to-analog converters, driving transformers in 100BaseTX networks multiple output current lines are required based on a single input current. One way of providing this multiple output is through the use of a differential amplifier as a current splitter.
FIG. 2
is a circuit diagram showing a conventional differential amplifier used as a current splitter. As shown in
FIG. 2
, the differential amplifier comprises an input node
21
, first and second transistors
23
and
25
, first and second control nodes
27
and
29
, and first and second output nodes
31
and
33
. The first transistor
23
has its source connected to the input node
21
, its drain connected to the first output node
31
, and its gate connected to the first control node
27
. The second transistor
25
has its source connected to the input node
21
, its drain connected to the second output node
33
, and its gate connected to the second control node
29
. The first control nodes
27
receives the first control signal C
1
and controls the operation of the first transistor
23
by providing the first control signal C
1
to the gate of the first transistor
23
. The second control nodes
29
receives the second control signal C
2
and controls the operation of the second transistor
25
by providing the second control signal C
2
to the gate of the second transistor
25
. The input node
21
receives the input current I
IN
; the first output node
31
provides a first output current I
OUT1
when the first transistor
23
is turned on; and the second output node
33
provides a second output current I
OUT2
when the second transistor
25
is turned on.
The operation of the differential amplifier of
FIG. 2
as a current splitter is described below. The differential amplifier can provide different outputs at the two output nodes
31
and
33
depending upon the values of the first and second control signals C
1
and C
2
, and whether the first and second transistors
23
and
25
are turned on. As each of the two transistors
23
and
25
is turned on, it allows some or all of the input current I
IN
to flow through it to its respective output node
31
or
33
. Table 1 shows the output currents I
OUT1
and I
OUT2
for the possible combinations of C
1
and C
2
.
TABLE 1
C
1
C
2
I
OUT1
I
OUT2
0
0
0
0
0
1
0
I
IN
1
0
I
IN
0
1
1
I
IN
/2
I
IN
/2
As shown Table 1, if C
1
and C
2
are both “0”, th the first and second transistors
23
And
25
will both be turned off and no current will be able to flow through either transistor. As a result, the currents I
OUT1
and I
OUT2
at the first and second output nodes
31
and
33
will both be zero. If C
1
is “0” and C
2
is “1”, then the first transistor will be turned off and the second transistors will be turned on. The input current will thus be able to flow through the second transistor
25
, but not through the first transistor
23
. As a result, the current I
OUT1
, at the first output node
31
will be zero and the current I
OUT2
at the second output node
33
will be I
IN
Similarly, if C
1
is “1” and C
2
is “0”, then the first transistor will be turned on and the second transistors will be turned off. The input current will be able to flow through the first transistor
23
, but not through the second transistor
25
. As a result, the current I
OUT1
, at the first output node
31
will be I
IN
and the current I
OUT2
at the second output node
33
will be zero. Finally, if C
1
and C
2
are both “1”, then the first transistor
23
and the second transistor
25
will both be turned on, and the input current I
IN
will be able to flow through both the first transistor
23
and the second transistor
25
. As a result, the current I
OUT1
at the first output node
31
and the current I
OUT2
at the second output node
33
will both be I
IN
/2.
To insure an accurate current division, it is preferable to keep the conductive transistors in saturation.
If the difference between the two output currents I
OUT1
and I
OUT2
is taken for each of these possible control input situations, three separate current results are possible, +I
IN
, −I
IN
, or 0. Thus, a single input current can be transformed into multiple different output currents. In a similar manner, by transforming the output currents to voltages and taking the difference between the output voltages, three different output voltages can be generated depending upon the values of the control signals C
1
and C
2
.
However, the conventional differential amplifier current source does not allow a very high voltage swin
Oki Semiconductor
Volentine & Francos, PLLC
Wells Kenneth B.
LandOfFree
Precision differential switched current source does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Precision differential switched current source, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Precision differential switched current source will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2946061