Precision controlled RF power detector circuit

Demodulators – Amplitude modulation demodulator – Including diode demodulator device

Reexamination Certificate

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Details

C324S119000, C327S061000

Reexamination Certificate

active

06204727

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates, in general, to RF power detectors and, in particular, to a method and apparatus for removing unwanted parameters affecting the precision and design characteristics of a detector circuit.
BACKGROUND OF THE INVENTION
Without limiting the scope of the invention, its background is described in connection with a detector circuit used in a RF power detector.
In a wireless communication system, for example, a Global System for Mobile (GSM) system using a Time Division Multiple Access (TDMA) signaling format that includes a framed structure comprising eight time slots, a mobile station communicates with a base station by transmitting and receiving information in one or more of the time slots that comprise a channel. Each channel is assigned to a different user, with mobile-to-base transmission (uplink) on one frequency band and base-to-mobile (downlink) on a second frequency band.
In order to preserve the integrity of the transmitted and received information and to reduce adjacent channel interference, the system operates according to a standardized format that defines the requirements of transmission and reception. A system transmitting and receiving information often produces unwanted interference. This unwanted interference affects the integrity of the transmitted and received information. For example, a power control loop uses negative feedback to adjust the operating point of a power amplifier so that the power amplifier operates in a specified range. However, unwanted interference parameters inherent in the operation of the power control loop may cause an inaccurate representation of the information to be controlled in the feedback loop resulting in inaccurate adjustment of the power amplifier's operating point.
The feedback control loop controls the operation of the power amplifier by using a RF power detector to sample the output signal and compare the output signal with a reference signal, where the reference signal is proportional to the required output. The RF power detector output is used as an error signal to adjust the power amplifier's operating point to correct any unwanted deviations detected at the output. Unwanted interference parameters of the RF power detector could affect the signals in the loop and may result in an incorrect adjustment of the power amplifier.
RF power detectors comprise a detector circuit and a linearizer. The detector circuit rectifies a detected portion of RF input power and the linearizer outputs a linear voltage. The relationship between detected voltage and RF input is linear for high power levels and square law for low power levels. The linear circuit is required to amplify the square law region and thus increases the power detectors dynamic range. The generation of unwanted parameters inherent in the operation of the detector circuit and linearizer affects the linear relationship between the RF power detector output and RF input at low power levels, thus reducing the detector's dynamic range.
Reference is now made to
FIG. 1
where a prior art RF power detector is illustrated and denoted generally as
10
. RF power detector
10
comprises a detector circuit
12
for receiving a RF input power P
in
and a linearizer
14
for supplying a linear voltage. Detector circuit
12
comprises a diode D for detecting a level, detected voltage V
det
, of RF input power P
in
. Diode D comprises an anode coupled to RF input power P
in
and a cathode coupled to linearizer
14
through a capacitor C and a resistor R. Diode D is biased by a bias current I
b
from a bias voltage source −V
s
coupled to diode D through a resistor R
b
. Biasing diode D creates a voltage drop V
D
that is a function of varying operating temperatures of diode D.
Linearizer
14
may comprise a compensated logarithmic amplifier
16
such as the one described in co-pending U.S. patent application, filed Jul. 16, 1999, Ser. No. 09/354,984. Compensated logarithmic amplifier
16
comprises a logarithmic amplifier
18
and a compensation circuit
20
for removing unwanted parameters from a power detector output V
out
. The operational effect of compensated logarithmic amplifier
16
is represented as a external voltage source V
a
independent of the operation of detector circuit
12
. A detector voltage V
c
across capacitor C is coupled to linearizer
14
through resistor R producing a detector current I
c
supplied to linearizer
14
. Ideally detector output voltage V
c
should equal detected voltage V
det
, however, operational affects of diode D, voltage drop V
D
, and external voltage source V
a
affect detector current I
c
causing a misrepresentation of RF input power P
in
.
I
c
=
1
R
1
·
(
V
c
-
V
a
)
=
1
R
1
·
(
V
det
-
V
D
-
V
a
)
;



When



P
i



n

0
Eq
.


1
When there is no RF input applied under normal DC bias saturation there should be no detector current I
c
. However, with diode voltage V
D
and voltage source V
a
detector current I
c
does not equal zero as can be seen from equation 2.
I
c
=
1
R
1
·
(
-
V
D
-
V
a
)
;


When



P
i



n
=
0
Eq
.


2
Typically, voltage drop V
D
and external voltage source V
a
are compensated using bias point tuning in both detector circuit
12
and linearizer
14
. However, bias point tuning hinders design flexibility since tuning of one circuit is dependent on operational affects of the other circuit. Therefore, detector circuit
12
and linearizer
14
when designed must consider biasing measures used in the other circuit.
As may be seen from Equation 1 and Equation 2, an improved apparatus to effectively remove unwanted parameters affecting the output of a detecting circuit could improve the precision and design characteristics of RF power detector.
SUMMARY OF THE INVENTION
The present invention presents an improved apparatus for reducing internally and externally induced parameters at the output of a detector circuit used in RF power detectors.
A controlled detector circuit is presented for generating a detector current to the input of a selected circuit. Operation of the selected circuit generates an unwanted operational voltage on the input of the selected circuit affecting the detector current. The controlled detector circuit comprises a detector circuit having an RF input for detecting an RF signal and a detector output for providing the detector current in response to the RF signal. The detector output is coupled to the input of the selected circuit. Operation of the detector circuit generates a voltage drop affecting the detector current. Voltage drop and unwanted operational voltage are unwanted parameters affecting the precision of the detector current.
The controlled detector circuit comprises a control circuit having a control output coupled to the detector output. The control circuit generates a control voltage on the control output. The control voltage compensates the effects of the voltage drop and the operational voltage on the detector current.
In an embodiment, the detector circuit comprises a diode having a cathode and a anode with the anode coupled to the RF input and the cathode coupled to the detector output through a low pass filter. A bias voltage source for negatively biasing the diode is coupled to the cathode of the first diode. Biasing the diode produces the voltage drop, referred to herein as the first voltage drop, affecting the detector current. In this embodiment, the control circuit comprises a diode having a cathode and a bias voltage source coupled to the cathode for negatively biasing the diode. Biasing the diode produces a second voltage drop substantially equivalent to the first voltage drop. The control circuit further comprises an operational amplifier having a non-inverting input coupled to the operational voltage and an inverting input coupled to the cathode of the second diode. The operational amplifier further has an output defined as the control output coupled to t

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