Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Accelerating switching
Reexamination Certificate
2001-03-27
2002-11-05
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Accelerating switching
C327S512000, C327S538000
Reexamination Certificate
active
06476661
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to bipolar junction transistor (BJT) circuits in which an output transistor is driven close to saturation.
BACKGROUND OF THE INVENTION
CMOS (complementary metal oxide semiconductor) circuits require that the voltage of a signal be at either one of two predetermined voltage levels, one high and one low, typically 3.3 volts and 0 volts. However, output signals from BJT (bipolar junction transistor) circuits are usually at either of two values which differ from the predetermined levels required by the CMOS circuitry. Thus, in order for a BJT circuit to be coupled to a CMOS circuit these BJT values have to be pulled up to 3.3 volts and pulled down to 0 volts.
Typically, it has been found that pull-up to 3.3 volts can be achieved easily but pull-down is problematic. Typically, pull-down is achieved by driving an npn transistor close to saturation and using the collector/emitter voltage, V
CE
, as the pull-down voltage. In practice, the pull-down voltage achieved falls in a range 0.1-0.75 volts above the predetermined CMOS low reference level. However, according to the CMOS specification the pull-down voltage must be less than 0.5 volts above the low reference level. Furthermore, to avoid saturation, the pull-down voltage should preferably be greater than 0.2 volts above the low reference level. Thus, the pull-down voltage should fall in a range 0.2-0.5 volts above the low reference level.
There is clearly a discrepancy between the 0.2-0.5 volt range required for proper operation and the range 0.1-0.75 achieved in practice. If the pull-down voltage actually falls outside the 0.2-0.5 volt range the circuit would be considered unacceptable or failed.
It is an object of the invention to obviate or mitigate this problem.
SUMMARY OF THE INVENTION
According to one aspect of the invention there is provided a method of controlling the collector/emitter voltage of a bipolar junction transistor operating close to saturation comprising injecting a current which is proportional to absolute temperature parallel to the base emitter junction and selecting the values of certain circuit components connected to the transistor to provide a predetermined variation with temperature of the collector/emitter voltage.
According to another aspect of the invention there is provided a method of controlling the collector/emitter voltage of a bipolar junction transistor operating close to saturation comprising injecting a current which is proportional to absolute temperature parallel to the base emitter junction and selecting the values of certain circuit components connected to the transistor to minimise the variation with temperature of the collector/emitter voltage.
According to yet another aspect of the invention there is provided a circuit comprising first and second bipolar junction transistors each having a base, an emitter and a collector, at least two resistors, a voltage drop device and a current source arranged to generate a current iPTAT which is proportional to absolute temperature, wherein: the bases of the first and second transistors are connected together; the first resistor is connected across the base/emitter junction of the second transistor; the second resistor is connected across the base/collector junction of the first transistor; the current source is connected across the base/emitter junction of the first transistor; the emitters of the first and second transistors are both connected to a biasing voltage terminal; the collector of the first transistor is connected directly or indirectly to an input terminal; the voltage drop device is connected between the input terminal and the collector of the second transistor; and the values of at least the first and second resistors are selected to provide a predetermined variation with temperature of the voltage VCE across the collector/emitter of the second transistor.
REFERENCES:
patent: 5111071 (1992-05-01), Kwan et al.
patent: 6218894 (2001-04-01), De Langen et al.
Cunningham Terry D.
Nortel Networks Limited
Tra Quan
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