Precharged logic systems with protection against current leakage

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307468, 307481, 307263, 307530, H03K 1916, H03K 1995

Patent

active

050516205

ABSTRACT:
In a CMOS logic circuit an output node is controlled by a plurality of transistors of a first type and precharged by a precharging transistor of a second type. Clock pulses of alternate first and second levels are supplied to the precharging transistor. The first level switches the precharging transistor on to precharge the output node while the second level substantially switches off the precharging transistor but not completely so as to leave a small current flow through the precharging transistor.

REFERENCES:
patent: 4709168 (1987-11-01), Kamuro et al.
patent: 4851720 (1989-07-01), Pathak et al.

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