Precharged FET ROS array

Details Precharged FET ROS array Precharged FET ROS array

1977-10-31

1979-04-24

Hecker, Stuart N.

Static information storage and retrieval

Read only systems

Semiconductive

365203, G11C 1700, G11C 700

Patent

active

041516036

ABSTRACT:
The problem of a race condition in the precharged drain type FET read only storage circuits is avoided in the invention disclosed herein, by applying the bit decode signal to the source of the array device, so that the drain cannot be discharged through the FET array device unless both the bit line connected to the source and word line connected to the gate have on-signals. Thus, the memory circuit can be operated in a faster cycle because the word and bit signals may be made coincident.

REFERENCES:
patent: 3866186 (1975-02-01), Suzuki
patent: 4074238 (1978-02-01), Masuda
Gurski, Field Effect Transistor Read-Only Storage Unit, IBM Technical Disclosure Bulletin, vol. 7, No. 11, 4/65, pp. 1107-1108.

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