Boots – shoes – and leggings
Patent
1993-05-28
1994-09-13
Teska, Kevin J.
Boots, shoes, and leggings
368 10, 395775, 364DIG1, 364DIG2, G06F 1300, G06F 1338
Patent
active
053474724
ABSTRACT:
A low-power integrated circuit clock/calendar, wherein separate data busses are used for the time data and the alarm data. Conditional logic is used to only compare seconds bits (unless a match occurs, in which case higher-order bits are then compared). Thus, charging and discharging of the data busses (which carrying the time data) occurs only when a data transition is occurring. A special clocked latch circuit is used to hold the potential of each line of the time data bus constant, except when the data on the bus is actually changing. These innovations help to provide extremely long battery lifetime, since charge is not consumed by unnecessarily charging and discharging busses. Preferably this bus architecture is combined with a low-power logic architecture.
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Dallas Semiconductor Corporation
Teska Kevin J.
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