Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit
Reexamination Certificate
2002-10-31
2004-11-23
Faber, Alan T. (Department: 2651)
Dynamic magnetic information storage or retrieval
General processing of a digital signal
Head amplifier circuit
C360S067000, C327S052000, C330S252000
Reexamination Certificate
active
06822817
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to preamplifier circuits, and more particularly to low-noise preamplifier circuitry of an integrated circuit (IC) which is suitable for use with a read sensor in a magnetic storage device.
2. Description of the Related Art
A magnetic storage device typically includes a magnetic head which has a read sensor, a magnetic disk, a read/write integrated circuit (R/W IC), and a suspension interconnect coupled between the read sensor and the R/W IC. The read sensor, which may be a magnetoresistive (MR) sensor or a giant magnetoresistive (GMR) sensor, is used for reading data from the disk. The read sensor is coupled to an input of the R/W IC, which generally includes read signal processing circuitry. The read signal processing circuitry biases the read sensor with a fixed direct current (DC) bias voltage or current, amplifies signals read from the disk, and may provide further processing of the amplified signals. The read sensor is coupled to the R/W IC through the suspension interconnect, which is primarily carried along an actuator arm. The suspension interconnect generally includes electrical conductors and, in one particular implementation, it includes copper alloy traces etched upon an insulator which extend along the actuator arm.
In general, the resistance of such read sensors change in response to changing magnetic flux orientations on the magnetic disk. Changes in resistance of the read sensor translate into a varying analog electrical signal which is received and processed by the R/W IC. The processed analog signals are ultimately converted into digital data. In this general fashion, the magnetic storage device is able to read data from the disk at relatively high data rates (e.g. greater than 300-400 megabits per second (Mbs)). Unfortunately, without appropriate preamplifier circuitry in the read circuitry, too much interference may be picked up while reading and amplifying the signals from the read sensor to the read circuitry. Such interference ultimately affects the accuracy and/or the speed in which the signals can be read from the disk. In addition, the R/W IC may include large internal capacitors to provide for the DC bias and an AC coupled amplifier input. Large internal capacitors, however, consume a large area in the R/W IC and increase its cost. Furthermore, transmission line effects of the suspension interconnect during high data rate operation may undesirably influence the spectral content of the read signal.
FIGS. 1-2
are schematic diagrams of prior art preamplifier circuits which may be used in read signal processing circuitry of a R/W IC, but have one or more of the above-stated deficiencies. In particular,
FIG. 1
is a schematic diagram of a preamplifier circuit
100
of the prior art which may be referred to as a common-emitter preamplifier. Preamplifier circuit
100
includes transistors
102
and
104
(denoted Q
1
and Q
2
, respectively), fixed current sources
106
and
108
, resistors
114
and
116
, and a capacitor
110
. A differential input of preamplifier circuit
100
(at V
2
and V
1
) is provided at the bases of transistors
102
and
104
, whereas a differential output of preamplifier circuit
100
(at V
out
) is provided at the collectors of transistors
102
and
104
. The collector of transistor
102
is coupled to a voltage source
118
through resistor
114
, whereas the collector of transistor
104
is coupled to voltage source
118
through resistor
116
. A first end of current source
106
is coupled to the emitter of transistor
102
and a second end of current source
106
is coupled to a voltage source
120
. Similarly, a first end of current source
108
is coupled to the emitter of transistor
104
and a second end of current source
104
is coupled to voltage source
120
. Capacitor
110
is shunted across the emitters of transistors
102
and
104
.
The primary disadvantage of preamplifier circuit
100
of
FIG. 1
is that, in magnetic storage applications, the size of capacitor
110
must be relatively large (e.g. on the order of 5 nanofarads (nF)). Unfortunately, such a large capacitor consumes a significant amount of real estate in an IC and thereby increases the IC's cost. In one specific design, it was noted that the capacitor required 40-50% of the space in the IC.
FIG. 2
is a schematic diagram of another preamplifier circuit
200
of the prior art, which may be referred to as a quasi-current sensing amplifier. Preamplifier circuit
200
is shown coupled to a read sensor
202
through a transmission line
206
. Read sensor
202
is illustrated as having an internal resistance
204
(denoted R
GMR
), and transmission line
206
is illustrated as having an impedance Z
0
). Preamplifier circuit
200
includes transistors
208
and
210
(denoted Q
1
and Q
2
, respectively), fixed current sources
212
and
214
, variable current sources
224
and
226
, resistors
216
and
218
, a capacitor
228
, and an operational transconductance amplifier (OTA)
230
. Transistors
208
and
210
have bases which are biased at a bias voltage V
Bias
, collectors which are coupled to a voltage source
220
(e.g. supply voltage V
cc
) through resistors
216
and
218
, respectively, and emitters which are coupled to first ends of fixed current sources
212
and
214
, respectively. The second ends of current sources
212
and
214
are coupled to a voltage source
222
.
First ends of variable current sources
224
and
226
are coupled to voltage source
220
directly, and second ends of controlled current sources
224
and
226
are coupled to emitters of transistors
208
and
210
, respectively. The differential input of preamplifier circuit
200
is provided at the emitters of transistors
208
and
210
, whereas a differential output of preamplifier circuit
200
is provided at the collectors of transistors
208
and
210
. The input of OTA
230
is coupled to the differential output of preamplifier circuit
200
, whereas the output of OTA
230
is coupled to both adjustable current sources
224
and
226
to control the current thereof. Capacitor
228
is coupled between the output of OTA
230
and voltage source
220
.
Preamplifier circuit
200
has a controllable input impedance which can provide an impedance match with transmission line
206
. The input impedance of preamplifier circuit
200
may be adjusted by adjusting the value of r
e
of transistors
208
and
210
. Unfortunately, this controlled input impedance feature has a significant impact on the noise performance of preamplifier circuit
200
. The mathematical expression for the input referred spot noise voltage source for preamplifier circuit
200
is
v
2
Vi
=4
kT
(2
r
b
+5
r
e
).
where k=Boltzmann's constant, T=temperature (Kelvin), r
b
=(transistor transconductance)
1
, and r
e
=transistor base resistance.
Accordingly, what is needed is an improved preamplifier circuit, especially one that has the ability to provide low-noise performance, relatively small AC coupling capacitor values to reduce the cost of the IC, and input impedance control to match the impedance of a transmission line for high data rate applications.
SUMMARY OF THE INVENTION
What is invented and described herein are circuits which may be referred to as Bi-Variant Coupled Pair (BVCP) circuits. BVCP circuits are suitable for use in channel front-end low-noise preamplifiers of magnetic storage devices as well as other applications. In a magnetic storage device, the channel front-end includes a read transducer, a read/write (R/W) integrated circuit (IC) which includes the BVCP circuit, and a suspension interconnect which connects the read transducer and the R/W IC. The read transducer may be a magnetoresistive (MR) or giant magnetoresistive (GMR) read sensor. In this particular application, the BVCP circuit has the ability to provide (1) a fixed direct current (DC) bias voltage for the varying resistance of the read transducer; (2) low-noise performance; and
Chung Paul Wingshing
Contreras John Thomas
Jove Stephen Alan
Faber Alan T.
Oskorep, Esq. John J.
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