Preamplification circuit

Amplifiers – Signal feedback – Variable impedance in feedback path varied by separate...

Reexamination Certificate

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Details

C330S110000, C330S282000

Reexamination Certificate

active

06404282

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a preamplification circuit that controls large signal inputs.
2. Description of the Related Art
FIG. 1
is a circuit diagram showing a configuration example of a conventional preamplification circuit.
As shown in
FIG. 1
, this conventional example comprises inverse amplifier
1
for amplifying and outputting a preamp input signal, buffer circuit
2
for buffering and outputting the signal outputted from inverse amplifier
1
, feedback resistors
3
and
4
connected in parallel to each other between the input terminal of inverse amplifier
1
and the output terminal of buffer circuit
2
for changing the gain of inverse amplifier
1
, phase compensation capacitor
7
connected between the input terminal and output terminal of inverse amplifier
1
for compensating the phase of inverse amplifier
1
, FET switch
5
for switching the connection between feedback resistor
4
and inverse amplifier
1
, buffer circuit
2
based on a gain switching signal supplied and FET switch
6
for switching between charge/discharge of phase compensation capacitor
7
based on the gain switching signal. The signal outputted from buffer circuit
2
is outputted as a preamp output signal (see Japanese Patent Laid-Open No. 1997-8563).
In the preamplification circuit in the above described configuration, the gain switching signal is fixed to LOW while the preamp input signal stays at a low level, which keeps OFF FET switch
5
. As a result, feedback resistor
3
is the only feedback resistor to control the gain of inverse amplifier
1
. Furthermore, FET switch
6
is turned OFF, and therefore phase compensation capacitor
7
is left open and discharged, and phase compensation is not performed using phase compensation capacitor
7
for inverse amplifier
1
.
On the other hand, while the preamp input signal stays at a high level, the gain switching signal is HIGH, which turns ON FET switch
5
. In this way, feedback resistors
3
and
4
function as the feedback resistors to control the gain of inverse amplifier
1
. As a result, the gain of inverse amplifier
1
becomes smaller than when the preamp input signal stays at a low level. Furthermore, FET switch
6
turns ON, which causes phase compensation capacitor
7
to be charged with the preamp input signal, and in this way, phase compensation is performed for inverse amplifier
1
.
In the conventional preamplification circuit above, charging to phase compensation capacitor
7
starts when the gain switching signal changes from LOW to HIGH.
As shown in
FIG. 2
, in this conventional example, charging to phase compensation capacitor
7
starts at the timing at which the preamp input signal changes from a low level signal to a high level signal and the gain switching signal changes from LOW to HIGH. However, if input of the low level signal persists long time, the amount of discharge of phase compensation capacitor
7
increases, and then when the preamp input signal becomes a high level signal and the gain switching signal becomes HIGH, a high current is pulled into inverse amplifier
1
. This introduces large noise to the preamp output signal, causing a problem of adversely affecting the circuits that follow.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a preamplification circuit capable of reducing noise applied to a preamp output signal when the preamp input signal changes from a low level signal to a high level signal.
In the present invention, when an input signal having a lower level than a predetermined threshold is supplied, first switching means performs control in such a way that the first feedback resistor is the only feedback resistor connected to amplifying means and the gain of the amplifying means is controlled only by the first feedback resistor. Then, when the input signal has a higher level than the predetermined threshold, the first switching means performs control in such a way that the feedback resistors connected to the amplifying means become the first and second feedback resistors connected in parallel to each other, thereby the gain of the amplifying means is controlled by the resistance value of the first and second feedback resistors connected in parallel. This allows the amplifying means to keep linearity without saturating even when the input signal changes from a lower level than the predetermined threshold to a higher level than the predetermined threshold.
Here, when an input signal having a higher level than the predetermined threshold is supplied, the phase compensation capacitor is charged under the control of the second switching means for phase compensation of the amplifying means. However, even when the input signal has a lower level than the predetermined threshold, the phase compensation capacitor is charged at predetermined timing under the control of third switching means, preventing a high current from being pulled into the amplifying means when the input signal changes from a lower level than the predetermined threshold to a higher level than the predetermined threshold, thus reducing noise applied to the output signal.
The above and other objects, features, and advantages of the present invention will become apparent from the following description based on the accompanying drawings which illustrate examples of preferred embodiments of the present invention.


REFERENCES:
patent: 6114910 (2000-09-01), Goff
patent: 6140878 (2000-10-01), Masuta
patent: 6246284 (2001-06-01), Nemoto
patent: 6307433 (2001-10-01), Ikeda
patent: 60-85613 (1985-05-01), None
patent: 2-289904 (1990-11-01), None
patent: 8-102716 (1996-04-01), None
patent: 9-8563 (1997-01-01), None
patent: 10-13172 (1998-01-01), None
patent: 2737718 (1998-01-01), None
patent: 2001237653 (2001-08-01), None

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