Preamble acquisition without second order timing loops

Details Preamble acquisition without second order timing loops Preamble acquisition without second order timing loops

2010-12-03

2011-12-13

Bayard, Emmanuel (Department: 2611)

Pulse or digital communications

Receivers

Automatic frequency control

C375S339000

Reexamination Certificate

active

08077814

ABSTRACT:
A clock is adjusted by obtaining a first plurality of samples and a second plurality of samples associated with a preamble portion of a data packet. The first plurality of samples and the second plurality of samples are sampled using a clock. A first intermediate value is determined based at least in part on the first plurality of samples and a second intermediate value is determined based at least in part on the second plurality of samples. An ending value associated with an end of the preamble portion is determined based at least in part on the first intermediate value and the second intermediate value. The clock is adjusted based at least in part on the ending value without use of a second order timing loop.

REFERENCES:
patent: 6252733 (2001-06-01), Staszewski
patent: 6693872 (2004-02-01), Brewen et al.
patent: 7869547 (2011-01-01), Xia et al.
patent: 2006/0256464 (2006-11-01), Ozdemir

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