Pre-diffused logic circuit including at least one amplifier comp

Details Pre-diffused logic circuit including at least one amplifier comp Pre-diffused logic circuit including at least one amplifier comp

1990-10-05

1992-06-30

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 3073032, H03K 1704

Patent

active

051265990

ABSTRACT:
Disclosed is a pre-diffused logic integrated circuit, a part of which is converted into an analog circuit. A pre-diffused logic circuit includes a plurality of logic circuits, each formed by non-wired signal transistors. If the fan-out of a logic operator has to be increased, the transistors of a neighboring logic cell are parallel mounted so that at least two signal transistors are parallel mounted to make an amplifier transistor therefrom and at least two transistors are connected to make a current source therefrom for this amplifier. This conversion is done during the final metallizations for customizing the pre-diffused circuit.
The present invention finds particular application in fast logic circuits.

REFERENCES:
patent: 4682202 (1987-07-01), Tanizawa
patent: 4727266 (1988-02-01), Fujii et al.
patent: 4864381 (1989-09-01), Seefeldt et al.
patent: 4904886 (1990-02-01), Tanahashi
patent: 4933576 (1990-06-01), Tamamura et al.
IEEE Journal of Solid-State Circuits, vol. SC-19, No. 5, Oct. 1984, pp. 728-738, IEEE, N.Y., U.S.; R. N. Deming et al.; "A Gallium Arsenide Configurable Cell Array Using Buffered Fet Logig".
IEEE GaAs IC Symposium, Boston, Mass., Oct. 23-25, 1984, pp. 15-18, IEEE, N.Y., U.S.; R. N. Deming et al.; "A Gallium Arsenide Configurable Cell Array Using Buffered FET Logic".
E.D.N. Electrical Design News, vol. 27, No. 22, Nov. 1982, pp. 113-117, Boston, Mass., U.S.: R. Pate et al.; "Observe Simple Design Rules When Customizing Gate Arrays".
Patent Abstracts of Japan, vol. 11, No. 217 (E-523 [2664], Jul. 14, 1987; & JP-A-62 35 716 (Hitachi Ltd.) Feb. 16, 1987.

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