Pre-biased voltage level shifting circuit for integrated...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S108000, C326S080000, C326S081000

Reexamination Certificate

active

06768367

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates, in general, to the field of integrated circuit (“IC”) devices. More, particularly, the present invention relates to a pre-biased voltage level shifting circuit of especial applicability with respect to those ICs requiring a technique for converting circuit operation between differing power supply levels.
When different power supplies are required in a circuit, a means of transitioning between the differing supplies is required. With existing circuit techniques, the primary deficiency in operation is the speed at which the level translation occurs between signals based on the two different power supplies.
Certain conventional circuit implementations not only exhibit operational speed problems but can also waste power due to undesired current flow between a given power supply input and circuit ground. In other circuits a “fight” condition can exist between transistors such that level shifting is slower intone direction (e.g. from “high” to “low”) than the other. Regardless of circuit design, existing level shifting schemes exhibit a negative impact on circuit speed performance.
SUMMARY OF THE INVENTION
Disclosed herein is a pre-biased voltage level shifting circuit of especial applicability with respect to those integrated circuit devices requiring a technique for converting circuit operation between differing power supply levels. In a representative embodiment, the circuit utilizes feedback to make the switching transistors faster to thereby increase the speed of the level translation of signals based upon two different power supplies.
Particularly disclosed herein is a voltage level shifting circuit having first and second supply voltage level inputs thereto. The circuit comprises a first switching device coupling a first circuit node to a second circuit node, with the first switching device having a control terminal coupled to the first supply voltage level input. Second and third switching devices are coupled between the second supply voltage level input and a third circuit node and a fourth switching device is coupled between the third circuit node and the second circuit node. Fifth and sixth series coupled switching devices are coupled between the second supply voltage level input and a reference voltage input and define a fourth circuit node therebetween. A control terminal of the fifth switching device is coupled to the second circuit node and a control terminal of the sixth switching device is coupled to the first circuit node. Seventh and eighth series coupled switching devices are coupled between the second supply voltage level input and the fourth circuit node with a control terminal of the eighth switching device being coupled to the second circuit node. A first circuit delay block couples the fourth circuit node to a control terminal of the, seventh switching device and a second circuit delay block couples the control terminal of the seventh switching device to a control terminal of the third switching device.
Further disclosed herein is a voltage level shifting circuit comprising an input node for receiving an input signal transitioning between a reference voltage level and a first voltage level. The circuit further comprises an output node for providing a complementary output signal transitioning between a second voltage level and the reference voltage level. An intermediate node is coupled between the input and output nodes and has a state thereof which tracks a state of the input signal. A feedback circuit having a feedback node thereof is coupled to the output node and has a state thereof which corresponds to that of the output node. In a particular embodiment disclosed herein, the voltage level shifting circuit may comprise an additional feedback circuit having another feedback node thereof coupled to the intermediate node and having a state thereof which corresponds to that of the intermediate node.


REFERENCES:
patent: 4574273 (1986-03-01), Atsumi et al.
patent: 5151622 (1992-09-01), Thrower et al.
patent: 5317213 (1994-05-01), Sato et al.
patent: 5650742 (1997-07-01), Hirano
patent: 6084430 (2000-07-01), Wayner
patent: 6480050 (2002-11-01), Barnes
patent: 6509772 (2003-01-01), Ye et al.
patent: 6559691 (2003-05-01), Mawatari et al.

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