Practical way to remove heat from SOI devices

Details Practical way to remove heat from SOI devices Practical way to remove heat from SOI devices

1999-08-17

2001-02-20

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

On insulating substrate or layer

C438S149000

Reexamination Certificate

active

06190985

ABSTRACT:

TECHNICAL FIELD
The present invention generally relates to improved Silicon-on-Insulator devices. More particularly, the present invention relates to methods for removing heat from Silicon-on-Insulator devices and devices having such characteristics.
BACKGROUND ART
Silicon-on-Insulator (SOI) technology is of growing importance in the field of integrated circuits. SOI technology involves forming transistors in a relatively thin layer of semiconductor material overlying a layer of insulating material. More particularly, SOI technology is characterized by the formation of a thin silicon layer (device region) for formation of the active devices over an insulating layer, such as an oxide, which is in turn formed over a substrate. Transistor sources and drains are formed, for example, by implantations into the silicon layer while transistor gates are formed by forming a patterned oxide and conductor layer structure.
Such structures provide a significant gain in performance by having lower parasitic capacitance (due to the insulator layer) and increased drain current due to floating body charging effects (since no connection is made to the channel region and charging of the floating body provides access towards a majority of carriers which dynamically lower the threshold voltage, resulting in increased drain current). Devices, such as metal oxide silicon field effect transistors (MOSFET), have a number of advantages when formed on SOI wafers versus bulk silicon MOS transistors. These advantages include: reduced source/drain capacitance and hence improved speed performance at higher-operating frequencies; reduced N
+
to P
+
spacing and hence higher packing density due to ease of isolation; absence of latch-up; lower voltage applications; and higher “soft error” upset immunity (i.e., the immunity to the effects of alpha particle strikes).
Although there are significant advantages associated with SOI technology, there are significant disadvantages as well. For example, poor heat removal from devices on an SOI substrate is a significant disadvantage. Electrical devices generate heat, and the inability to remove or dissipate the heat results in poor and/or inconsistent performance of the electrical devices, or even in some instances device and/or substrate degradation.
There is poor heat removal for devices on SOI substrates primarily because of the oxide insulation layer. More specifically, the oxide insulation layer has a markedly lower thermal conductivity than the thermal conductivity of conventional bulk silicon (typically used as semiconductor substrates), which typically surrounds semiconductor devices. For example, the thermal conductivity of silicon dioxide is about 1.4 W/m° C. while the thermal conductivity of conventional bulk silicon is about 150 W/m° C. As a result, the buried oxide layer undesirably insulates thermally the device region in SOI substrates.
In view of the aforementioned disadvantages, there is a need for SOI devices of improved quality, particularly SOI devices having improved heat removal characteristics, and more efficient methods of making such SOI devices.
SUMMARY OF THE INVENTION
As a result of the present invention, an SOI substrate having improved heat removal characteristics (from the device layer) is provided. By forming an SOI substrate according to the present invention, improved performance of devices subsequently formed on the SOI substrate is facilitated. Moreover, forming an SOI substrate in accordance with the present invention does not degrade or deleteriously effect the advantageous properties and characteristics commonly associated with SOI technology (improved speed performance at higher-operating frequencies, higher packing density, absence of latch-up, lower voltage applications, and higher “soft error” upset immunity).
In one embodiment, the present invention relates to a method of forming an SOI substrate, involving the steps of providing a first silicon substrate; depositing a metal based layer over the first silicon substrate; forming a first insulation layer over the metal based layer to provide a first structure; providing a second structure comprising a second silicon layer and a second insulation layer; bonding the first structure and the second structure together so that the first insulation layer is adjacent the second insulation layer; removing a portion of the second silicon layer thereby providing the SOI substrate having a combined insulation layer having a thickness of about 100 Å to about 5,000 Å, wherein the metal based layer has a thickness that is one of less than 15% of the thickness of the combined insulation layer and greater than 50% of the thickness of the combined insulation layer.
In another embodiment, the present invention relates to a method of facilitating heat removal from a device layer of an SOI substrate comprising bulk silicon, an insulation layer over the bulk silicon, and a silicon device layer over the insulation layer, involving the steps of forming a metal based layer having a thickness from about 100 Å to about 4,000 Å between the bulk silicon and the insulation layer; and forming a conductive plug through at least one of the insulation layer and the silicon device layer contacting the metal based layer, and the bulk silicon contacting the metal based layer.
In yet another embodiment, the present invention relates to an SOI substrate containing a silicon substrate layer; a metal based layer comprising a metal silicide over the silicon substrate layer; an insulation layer over the metal based layer; a silicon device layer comprising silicon over the insulation layer; and at least one of a) at least one conductive plug through the insulation layer and the silicon device layer contacting the metal based layer, and b) at least one conductive plug through the silicon substrate layer contacting the metal based layer.


REFERENCES:
patent: 5006913 (1991-04-01), Sugahara et al.
patent: 5102821 (1992-04-01), Moleshi et al.
patent: 5387555 (1995-02-01), Linn et al.
patent: 5504376 (1996-04-01), Sugahara et al.
patent: 5569620 (1996-10-01), Linn et al.
patent: 5569621 (1996-10-01), Yallup et al.
patent: 5895953 (1999-04-01), Beasom et al.

Affiliated with

Also associated with

Rating

Practical way to remove heat from SOI devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Practical way to remove heat from SOI devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Practical way to remove heat from SOI devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2601266