Practical M-ary demodulator and method of operation for use...

Details Practical M-ary demodulator and method of operation for use... Practical M-ary demodulator and method of operation for use...

2006-08-22

2006-08-22

Tse, Young T. (Department: 2637)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S147000, C375S324000, C329S304000

Reexamination Certificate

active

07095810

ABSTRACT:
A demodulator for demodulating S orthogonal modulation codes, each code comprising M binary bits representing an N-bit data symbol, where M=2N. The demodulator comprises a Logic 00 detector for comparing pairs of binary bits to 00 and outputting [+1,+1] if a match occurs or [−1,−1] otherwise; S accumulators; and a Logic 00 switch array comprising S switches, where a Kth switch couples an output of the Logic 00 detector to a first input of a Kth S accumulator. The demodulator also comprises a storage array for storing S code masks, each code mask comprising M/2 code mask bits and each M/2 code mask bit associated with a corresponding sequential pair of M binary bits; and control circuitry for synchronously applying the M/2 code mask bits in a Kth code mask as a control signal to the Kth switch in the Logic 00 switch array.

REFERENCES:
patent: 5469469 (1995-11-01), Haines
patent: 6925133 (2005-08-01), Cleveland
patent: 2003/0123576 (2003-07-01), Cleveland et al.
patent: 2003/0123577 (2003-07-01), Cleveland

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