Power up circuit

Details Power up circuit Power up circuit

1990-12-14

1992-09-15

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307594, H03K 1720

Patent

active

051480514

ABSTRACT:
An integrated circuit with power-up-warning circuitry wherein time integration and voltage level testing are done sequentially instead of simultaneously. A reference voltage is generated by current sourced to a reference voltage circuit, and this reference voltage is used as follows: An inverter receives the reference voltage as an input, and switches when the power supply becomes high enough that the reference voltage appears as a "low" level. When this inverter switches, current begins to be sourced to a timing capacitor. After the timing capacitor has charged up to a predetermined level, the current source to the reference-voltage node is turned off, and the power-up-warning signal (which has been driven high by output buffers) is turned off.

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patent: 4900950 (1990-02-01), Dubajet
patent: 4902907 (1990-02-01), Haga et al.

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