1985-02-04
1987-04-07
Larkins, William D.
357 51, 357 71, 357 59, H01L 2972, H01L 2706, H01L 2904, H01L 2348
Patent
active
046564969
ABSTRACT:
A power transistor structure that is well suited to both switching and lower-voltage linear applications is displayed. A key element of the design is thin-film ballast resistors that act as a second level of interconnect. They can be connected to or insulated from the overlying metal and the underlying silicon, except where contact holes are provided. Thus, an intricate structure having small emitters with individual ballast resistors can be fabricated below the wide metal busses required to carry current out of a large power array. The result is a ballasting scheme that can be optimized for a wide range of linear and switching applications while making efficient use of metallization which often limits the size of power arrays. This is especially important in the design of IC power transistors where both the emitter and collector current must be conducted out of the array with surface metallization. The integration of a thermal sensor into the array that responds to hot spots for controlling the peak junction temperature greatly increases the power ratings that can be guaranteed, while providing more effective overload protection.
REFERENCES:
patent: 4136354 (1979-01-01), Dobkin
patent: 4297597 (1981-10-01), Kimura
patent: 4370670 (1983-01-01), Nawata et al.
Lamont John
Larkins William D.
National Semiconductor Corporation
Woodward Gail W.
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