Power supply voltage step-down circuit, delay circuit, and...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S538000, C327S540000, C327S541000

Reexamination Certificate

active

07456681

ABSTRACT:
A delay circuit has a circuit structure dominated by an NMOS or a PMOS transistor. The delay circuit is supplied with, as a power supply voltage, an output voltage of a power supply voltage step-down circuit having a level generating circuit for generating a reference voltage obtained by an offset voltage and a manufacturing variation dependent voltage, and an m-time voltage generating circuit. A semiconductor device includes the delay circuit.

REFERENCES:
patent: 6624680 (2003-09-01), Schenck
patent: 7042266 (2006-05-01), Takahashi
patent: 2004/0238875 (2004-12-01), Nakai
patent: 2005/0179485 (2005-08-01), Iwase
patent: 2005/0195020 (2005-09-01), Matsushita
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patent: 9-8617 (1997-01-01), None
patent: 2000357951 (2000-12-01), None
patent: 2004-20325 (2004-01-01), None

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