Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2006-12-26
2006-12-26
Clark, S. V. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S691000
Reexamination Certificate
active
07154174
ABSTRACT:
A packaging system for a high current, low voltage power supply. The power supply uses bare die power FETs which are directly mounted to a thermally conductive substrate by a solder attachment made to the drain electrode metallization on the back side of the FETs. The source electrode and gate electrode of each FET are coupled to the circuitry on an overhanging printed circuit board, using CSP solder balls affixed to the front side of the FET die. The heat generated by the FETs is effectively dissipated by the close coupling of the FETs to the thermally conductive underlying substrate. High interconnect densities are achieved through the use of a multilayer printed circuit board. This high interconnect density, with the addition of a magnetic core element, allows the power supply packaging system to incorporate transformer windings for an isolation transformer or an inductor.
REFERENCES:
patent: 6111322 (2000-08-01), Ando et al.
patent: 6603154 (2003-08-01), Sakai et al.
patent: 6774466 (2004-08-01), Kajiwara et al.
patent: 6867678 (2005-03-01), Yang
patent: 6903938 (2005-06-01), Waffenschmidt
Printed Circuit Board-Answers.com pp. 4-9.
Clark S. V.
O'Melveny & Myers LLP
Power-One, Inc.
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