Power supply device

Details Power supply device Power supply device

2000-06-13

2001-03-20

Nguyen, Matthew (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S282000

Reexamination Certificate

active

06204646

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power supply device for supplying electric power to a load.
2. Description of the Prior Art
FIG. 6
shows a circuit diagram of a conventional power supply device. In this figure, reference numeral
1
represents an operational amplifier, reference numeral
2
represents an output transistor composed of a PNP-type transistor, reference numerals
3
and
4
represent resistors, reference numeral
5
represents an output current detection transistor composed of a PNP-type transistor, and reference numeral
60
represents an output current control signal generating circuit that, only when the value of the current fed to its input terminal “i” is higher than a predetermined value, outputs from its output terminal “o” an output current control signal S, which is a signal that varies according to the value of the current fed in.
Here, if it is assumed that the ratio of the emitter area of the output transistor
2
to that of the output current detection transistor
5
is N: 1, and that the two transistors have identical collector-emitter voltages and identical base currents, then the ratio of the current flowing through the output transistor
2
(hereafter referred to as the “output current”) I
O
to the current flowing through the output current detection transistor
5
(hereafter referred to as the “detected current”) I
K
is N: 1 (where 1<N).
This power supply device has its constituent circuit elements interconnected as follows. The output transistor
2
has its base connected to the output terminal of the operational amplifier
1
, has its emitter connected to a direct-current supplied power line L having a voltage V
CC
, and has its collector grounded through two resistors
3
and
4
connected in series. The output current detection transistor
5
has its base connected to the output terminal of the operational amplifier
1
, and has its emitter connected to the supplied power line L. The collector current of the output current detection transistor
5
, i.e. the detected current I
K
, is fed to the terminal “i” of the output current control signal generating circuit
60
.
The operational amplifier
1
receives a setting voltage V
REF
at its inverting input terminal (−), and its non-inverting input terminal (+) is connected to the node A between the two resistors
3
and
4
connected in series. The node B between the collector of the output transistor
2
and the resistor
3
is connected to an output terminal OUT. To the output terminal OUT, a load
100
is connected.
The operational amplifier
1
also has an output current adjustment terminal T, and is so configured as to limit the output current in accordance with a signal fed to this output current adjustment terminal T. More specifically, here, the operational amplifier
1
is so configured that, as the value of the signal fed to the output current adjustment terminal T becomes higher, the output current is limited more, and, as the value of the signal fed to the output current adjustment terminal T becomes lower, the output current is limited less. To the output current adjustment terminal T of the operational amplifier
1
, the output current control signal S is fed that is output from the terminal “o” of the output current control signal generating circuit
60
. The output current control signal S is a current that flows from the terminal T through the transistor Q
3
to ground.
The output current control signal generating circuit
60
is configured as follows. The input terminal “i” is connected to one end of a resistor R, and also to the base of an NPN-type transistor Q. The other end of the resistor R is connected to ground. The transistor Q has its emitter connected to ground, and has its collector connected to the terminal “o”.
In this output current control signal generating circuit
60
configured as described above, when the value of the current fed in (i.e. the current flowing through the resistor R) is lower than a predetermined value, the transistor Q remains off, and thus the value of the output current control signal S is zero. By contrast, when the value of the current fed in is higher than the predetermined value, the higher the value of the current fed in, the higher the value of the output current control signal S and, the lower the value of the current fed in, the lower the value of the output current control signal S.
In this circuit configuration, the output current I
O
is converted by the resistors
3
and
4
into a voltage that is fed out via the output terminal OUT, and the voltage at the node A between the resistors
3
and
4
is used as the setting voltage V
REF
. In addition, a current limiter circuit, constituted by the operational amplifier
1
, the output current detection transistor
5
, and the output current control signal generating circuit
60
, operates in such a way that, when the value of the output current I
O
becomes higher than a predetermined value, the higher the value of the output current I
O
, the more difficult it becomes for the base current I
B
of the output transistor
2
to flow, and thus the tighter the limit on the value of the output current I
O
becomes.
However, in this conventional power supply device, the value of the output current I
O
is limited irrespective of the output voltage (the voltage at the output terminal OUT), and therefore, when the output voltage is zero volts, an amount of electric power corresponding to the output current I
O
multiplied by the supplied voltage V
CC
is dissipated in the output transistor
2
, and the resulting heat may lead to thermal runaway.
Moreover, in some cases, together with a load
100
to which to supply electric power, a capacitor for preventing oscillation may be connected to the output terminal OUT, or even a capacitance may be present in the load
100
itself. In such cases, when the power supply device is started up, a large output current flows to charge such capacitances (hereafter, such an output current will be referred to as an “inrush current”).
In the conventional power supply device described above, the current limiter circuit mentioned above operates to reduce an inrush current, but only with a limited effect. It is to be noted that a large inrush current causes a fluctuation in the voltage V
CC
on the supplied voltage line L, which may lead to malfunctioning of other circuits connected to the supplied voltage line L.
To sum up, this conventional power supply device tends to incur a large inrush current, and is thus likely to adversely affect other circuits that are connected to the common supplied power line L.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a power supply device that is less likely to adversely affect other circuits connected to a common supplied power line.
To achieve the above object, according to one aspect of the present invention, a power supply device is provided with: an output terminal; output means for supplying an output current to a load connected to the output terminal; output voltage detection means for detecting the output voltage at the output terminal; output control means for controlling the output means in accordance with the result of detection by the output voltage detection means so as to keep the output voltage at a predetermined value; first means for outputting a monitoring current that varies in an identical manner with the output current; second means for feeding, when the value of the monitoring current output from the first means is higher than a predetermined value, an output current control signal to the output control means in order to instruct the output control means to reduce the value of the output current in such a way that, the higher the value of the monitoring current, the lower the value of the output current; and a capacitive element connected between the input terminal of the second means and the output terminal.
In this circuit configuration, when the power supply device is started up, the voltage obtained by

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