Dynamic magnetic information storage or retrieval – Automatic control of a recorder mechanism
Reexamination Certificate
1998-10-09
2001-09-18
Sniezek, Andrew L. (Department: 2651)
Dynamic magnetic information storage or retrieval
Automatic control of a recorder mechanism
C360S095000, C360S060000, C369S053180
Reexamination Certificate
active
06292322
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to an apparatus for processing a read signal and a write signal for a magnetic disk drive, and, more particularly, to a system of controlling the supply of power to individual circuits in a signal processing apparatus.
DESCRIPTION OF THE RELATED ART
A magnetic disk drive has a drive head for reading data recorded on a magnetic disk, and a signal processing apparatus which processes a data signal read from the magnetic disk and a data signal to be written thereon. The signal processing apparatus is preferably constructed of single integrated circuit device. The trend toward faster processing of data signals unfortunately includes increased power consumption.
Japanese Unexamined Patent Publication No. H3(1991)-122865 discloses a signal processing apparatus that has lower power consumption. In a period when no read and write commands are received (rough servo period), the supply of power to the signal processing apparatus is cut off. In a fine servo period, immediately before entering a read operation and write operation, power is supplied to the signal processing apparatus. This control reduces the power consumption. Because power supply is inhibited only in a period in which no read and write commands are received, there is still room for improvement.
Another proposed signal processing apparatus has a circuit that sets the power source on or off for each module in the apparatus. However, an analog module has large power consumption, and, once powered off, needs time to be powered on again. To prevent such time loss, power supply only to the analog module is permitted. Such power supply becomes an obstacle to lowering the overall power consumption.
Accordingly, it is an object of the present invention to provide a signal processing apparatus having reduced power consumption.
SUMMARY OF THE INVENTION
In one aspect of the invention, a method of supplying power to a signal processing apparatus includes the steps of: storing power up times of a plurality of individual circuits of the signal processing apparatus; determining power on times for the plurality of individual circuits in advance of said determined power on times for a predetermined operation; calculating power supply inhibit times for the plurality of circuits using the power up time of the individual circuits and the circuit power on time; and while performing the predetermined operation, inhibiting and enabling the supply of power to individual ones of the plurality of circuits based on the calculated inhibit times.
In another aspect of the invention, a signal processing apparatus includes a read signal processing section having a plurality of circuits for processing a read signal in a read operation; a write signal processing section having a plurality of circuits for processing write data to generate a write signal in a write operation; a servo signal processing section having a plurality of circuits for processing the read signal to acquire servo information from the read signal in a servo period; and a power supply control circuit having a plurality of gate circuits connected to individual circuits of at least one of the read signal processing section, the write signal processing section and the servo signal processing section.
In yet another aspect of the invention, a control apparatus is provided for controlling a signal processing apparatus. The signal processing apparatus includes a read signal processing section having a plurality of circuits for processing a read signal in a read operation, a write signal processing section having a plurality of circuits for processing data to be written to generate a write signal, and a servo signal processing section having a plurality of circuits for processing the read signal to acquire servo information from the read signal in a servo period. The control apparatus operates to acquire information about a next operation to be performed several cycles ahead of an operation currently being performed, based on read information or write information, to determine an inactive period for a circuit during the next operation using the acquired information, to determine a circuit whose inactive period exceeds a power-up time thereof, based on the determined inactive periods and predetermined power-up times of the individual circuits of at least one of the read signal processing section, the write signal processing section and the servo signal processing section, to determine a timing for inhibiting power supply to the individual circuits of the read signal processing section, the write signal processing section and the servo signal processing section based on the determined information, and to output signals for inhibiting power to the circuits having inactive periods that exceed their power-up time in accordance with the determined timing.
In one aspect of the invention, a disk drive includes a signal processing apparatus for executing a read operation, a write operation and a servo operation. The signal processing apparatus includes a read signal processing section having a plurality of circuits for processing a read signal in a read operation, a write signal processing section having a plurality of circuits for processing data to be written, to generate a write signal in a write operation, and a servo signal processing section having a plurality of circuits for processing the read signal and the write signal to acquire servo information, and a control apparatus for controlling power supply to the signal processing apparatus. The control apparatus operates to acquire information about a read operation or a write operation several cycles ahead of a cycle of an operation currently being performed using read information or write information, to determine an inactive period of the individual circuits during the next operation using the acquired information, to determine a circuit whose inactive period exceeds a power-up time thereof, based on predetermined inactive periods and predetermined power-up times of the individual circuits of at least one of the read signal processing section, the write signal processing section and the servo signal processing section, to determine a timing for inhibiting power supply to the individual circuits of the read signal processing section, the write signal processing section and the servo signal processing section based on the determined information, and to output signals for inhibiting power to the circuits having inactive periods that exceed their power-up time in accordance with the determined timing.
Other aspects and advantages of the invention will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.
REFERENCES:
patent: 4816934 (1989-03-01), Tsuyuguchi
patent: 5402200 (1995-03-01), Shrinkle et al.
patent: 5412519 (1995-05-01), Buettner et al.
patent: 5412809 (1995-05-01), Tam et al.
patent: 5452277 (1995-09-01), Bajorek et al.
patent: 5774292 (1998-06-01), Georgiou et al.
patent: 5953174 (1999-09-01), Satou et al.
patent: 6151182 (2000-11-01), Koizumi et al.
patent: 3122865 (1991-05-01), None
Fujitsu Limited
Greer Burns & Crain Ltd
Sniezek Andrew L.
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