Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-10-11
2002-12-31
Riley, Shawn (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S280000, C323S281000, C323S316000, C327S541000, C327S542000, C330S269000, C330S271000, C330S255000
Reexamination Certificate
active
06501252
ABSTRACT:
BACKGROUND OF THE INVENTION
Technical Field of the Invention
The present invention relates to a power supply circuit such as a LCD driver, and more particularly to a voltage follower type power supply circuit that supplies loads by a push-pull method.
Conventional Technology
In the conventional power supply circuits such as LCD drivers, a push-pull type shown in
FIG. 5
is known. The power supply circuit shown in
FIG. 5
includes a first amplification path
100
that supplies current to an output terminal using a P-channel transistor at its output stage, and a second amplification path
200
that absorbs current from the output terminal using an N-channel transistor in its output stage. The power supply circuit is fed with a first potential V
10
and a second potential V
20
that are obtained by voltage-dividing an input potential V
H
at a high potential side and an input voltage V
L
at a lower potential side by resistors R
10
, R
20
and R
30
. Since the second potential V
20
at a lower side is supplied to the first amplification path
100
, and the first potential V
10
at a higher side is supplied to the second amplification path
200
, the output transistor of the first amplification path
100
and the output transistor of the second amplification path
200
do not normally operate at the same time.
However, when threshold voltage or the like of transistors that for differential pairs of differential amplifiers included in the first amplification path
100
or second amplification path
20
changes due to process deviations, a problem occurs in that the output transistor of the first amplification path
100
and the output transistor of the second amplification path
200
may operate at the same time, and in this instance, a large current flows. On the other hand, when a value of the resistor R
20
is increased to increase an offset between the first potential V
10
and the second potential V
20
, a problem occurs in that the output voltage of the power supply circuit fluctuates in a wave-like manner.
It is noted that Japanese laid-open patent application SHO61-79312 describes a DC amplifier equipped with an offset adjustment device that controls the midpoint of the common source resistance of a first stage amplifier by inputting a direct current component included in an output of the amplifier in a window comparator and, when it exceeds a specified level, sending control signals to a multiplexer successively by operating a comparison resistor.
Also, Japanese laid-open patent application HEI 7-106875 describes a semiconductor integrated circuit equipped with differential transistors, a power supply transistor connected to commonly connected source electrodes of the differential transistors, a resistor and a power supply transistor connected in parallel therewith, a comparator that compares voltages of both ends of the resistor with a reference voltage and feeds back an output to the two power supply transistors.
However, the techniques described in these references are provided for adjusting a DC offset of an output potential, but not for controlling a push-pull operation at an output stage.
In view of the above, it is an object of the present invention to provide a power supply circuit that supplies power to a load by a push-pull method in which operations of a P-channel transistor and an N-channel transistor in an output stage are controlled, such that large currents that may flow due to process deviations or the like can be prevented.
SUMMARY OF THE INVENTION
To solve the problems described above, a power supply circuit in accordance with the present invention comprises: a first amplification path in which a first potential is input and that supplies current to an output terminal when a control signal is in a first state; a second amplification path in which a second potential is input and that absorbs current from the output terminal when a control signal is in a second state; an intermediate potential forming circuit that forms a third potential between the first potential and the second potential; and a comparison circuit that compares the third potential and a potential at the output terminal to form a control signal and supplies the same to the first and second amplification paths.
In the above embodiment, the first amplification path may include a negative feedback amplifier that uses a P-channel transistor at an output stage, and the second amplification path may include a negative feedback amplifier that uses an N-channel transistor at an output stage.
Also, the intermediate potential forming circuit may form the third potential by voltage-dividing the first potential and the second potential.
By the power supply circuit of the present invention having the structure described above, the third potential that defines a reference potential and a potential at the output terminal are compared to control the operations of the first and second amplification paths, whereby large currents that may flow due to process deviations or the like can be prevented.
REFERENCES:
patent: 5545970 (1996-08-01), Parkes et al.
patent: 5874830 (1999-02-01), Baker
patent: 5986910 (1999-11-01), Nakatsuka
patent: 6188211 (2001-02-01), Rincon-Mora et al.
patent: 6333623 (2001-12-01), Heisley et al.
Harness & Dickey & Pierce P.L.C.
Riley Shawn
Seiko Epson Corporation
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