Power source voltage controller

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Phase comparison

Reexamination Certificate

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Details

C324S076540

Reexamination Certificate

active

06313622

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power source voltage controller having a replica circuit for monitoring critical path delay of a semiconductor circuit.
2. Description of the Related Art
Recent semiconductor circuits generally are reduced in power consumption by the method of lowering a power source voltage V
DD
.
This is because lowering the power source voltage is the most efficient for reducing the power consumption of a semiconductor circuit (LSI) since the AC component of the power consumption of the LSI is proportional to the square of the power source voltage.
From this viewpoint, the method has recently been reported of dynamically controlling the power source voltage to deal with the operating frequency of the LSI and the fluctuations in the process.
In a power source voltage controller using such a so-called variable power source voltage system, a replica circuit having the same power source voltage-delay characteristic as the critical path is provided, and the power source voltage is controlled while judging whether the replica circuit can normally operate.
An LSI using this variable power source voltage control system is extremely effective in reducing the power consumption of the LSI.
Summarizing the problems to be solved by the invention, since it is extremely difficult to reproduce the exact same effects due to layout and interconnection as an actual critical path in the replica circuit, it is necessary to operate the replica circuit by giving it a certain delay margin.
However, addition of a delay margin to the replica circuit leads to an increase of the operating power source voltage. An excessive margin results in less of an effect of the power source voltage control system.
Also, a power source voltage controller using a replica circuit uses a phase comparison system of comparing the phases of a clock signal propagated through the replica circuit and an original clock signal before propagation and controlling the power source voltage by an up or down signal in accordance with the result of the phase comparison in order that the delay of the replica circuit not exceed one cycle of the operating frequency.
In this phase comparison system, however, only information of whether the phase is advanced or delayed is obtained. Information of about how much phase difference there is cannot be obtained.
Accordingly, the steps by which the power source voltage step can be changed end up becoming fixed at a certain value no matter what the phase difference is.
The minimum step of the power source voltage becomes the amount of fluctuation of the power source voltage at the time of convergence, so the smaller the step width, the smaller the power source voltage fluctuation at the time of convergence, however, the time to the convergence becomes longer.
Accordingly, for more efficient use of the power source voltage system, a method for setting an optimal margin for a replica circuit and an apparatus realizing both a small power source voltage fluctuation and a short convergence time have been sought.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a power source voltage controller which can set an optimal margin for a replica circuit, shorten a time for convergence of the power source voltage to the most suitable value, and efficiently use a power source voltage control system.
To attain the above objects, according to a first aspect of the present invention, there is provided a power source voltage controller comprising a semiconductor circuit having a transfer path and operating by receiving a power source voltage supply; a replica circuit having a power source voltage-delay characteristic approximately equivalent to that of a critical path of the semiconductor circuit, propagating a reference signal, and monitoring a delay time of the critical path of the semiconductor circuit; a phase difference detection circuit for receiving a delay signal from the replica circuit and the reference signal, having a delay time monitor gauge for detecting a phase difference of the delay signal from the reference signal, and outputting the detection result as phase difference information; and a voltage control circuit for generating a power source voltage of a value based on the phase difference information from the phase difference detection circuit and supplying the same to the semiconductor circuit and the replica circuit.
According to a second aspect of the present invention, there is provided a power source voltage controller comprising a semiconductor circuit having a transfer path and operating by receiving a power source supply; a replica circuit having a power source voltage-delay characteristic approximately equivalent to that of a critical path of the semiconductor circuit, propagating a reference signal, and monitoring a delay time of the critical path of the semiconductor circuit; a phase difference detection circuit for receiving a delay signal from the replica circuit and the reference signal, having a delay time monitor gauge for detecting a phase difference of the delay signal from the reference signal, and outputting the detection result as phase difference information; a voltage control circuit for generating a power source voltage of a value based on the phase difference information from the phase difference detection circuit and supplying the same to the semiconductor circuit and the replica circuit; and a delay error correction circuit arranged at either an input side of the reference signal of the replica circuit and an output side of the delay signal and able to correct a delay error with the critical path.
Preferably, it further comprises a pulse generator for generating a pulse, based on a clock of the semiconductor circuit, having a same length as one cycle of the clock for every several cycles and outputting it as the reference signal.
Preferably, the delay time monitor gauge has a delay element chain comprised of a plurality of delay elements connected in series and the phase difference detection circuit indicates the phase difference information by the number of delay elements.
Preferably, the power source voltage control circuit uses the delay element chain of the phase difference detection circuit as a delay margin and controls the delay margin by receiving the phase difference information.
Preferably, the phase difference detection circuit comprises a detecting means for detecting at least one delay time in the delay times corresponding to an excessively low voltage or an excessively high voltage longer or shorter than a predetermined delay time for the clock cycle of the replica circuit.
Preferably, the phase difference detection circuit further comprises a delay gate connected to the delay element chain and the detecting means detects a longer delay time than a predetermined delay time based on an output of the delay gate and detects a shorter delay time than a predetermined delay time based on a signal in a node in the middle of a signal propagation path of the replica circuit.
Preferably, the pulse generator generates at least one of a clock having an advanced phase and a clock having a delayed phase with respect to the clock of the semiconductor circuit and the detecting means detects a shorter time than a predetermined delay time based on the clock having an advanced phase and detects a longer delay time than a predetermined time based on the clock having a delayed phase.
According to a third aspect of the present invention, there is provided a power source voltage controller comprising a semiconductor circuit having a plurality of transfer paths for operating by receiving a power source supply; a plurality of replica circuits having power source voltage-delay characteristics approximately equivalent to that of a critical path of the semiconductor circuit, propagating a reference signal, and monitoring a delay time of the critical path of the semiconductor circuit; a selecting means for selecting as a delay signal an output signal of a replica circuit of the largest

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