Power source regenerative apparatus

Electricity: motive power systems – Braking – Dynamic braking

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Details

318459, 318 87, 318757, H02P 314

Patent

active

054913926

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to a power source regenerative apparatus, and in particular, to a power source regenerative apparatus which regenerates induction electromotive force caused in decelerating a motor to a power source.
2. Description of the Related Art
In decelerating a motor, the motor is operated as a generator, thereby regenerative braking is executed. Such an apparatus for controlling the aforesaid regenerative braking has been generally known as a power source regenerative apparatus. According to a conventional power source regenerative apparatus, after a regenerative current of a certain interphase becomes zero, the regenerative current flows into the next interphase.
FIG. 10 is a time chart showing an on/off state of transistors of a conventional converter, showing a change for every time of transistors Tr1 through Tr6, which corresponds to a change of a supply voltage. (Incidentally, a circuit of the converter is as shown in FIG. 11.) In FIG. 10, transistors Tr1, Tr3 and Tr5 turn the phase indicative of the maximum potential in three-phase (R-phase, S-phase, T-phase) supply voltage to an on-state. On the other hand, transistors Tr2, Tr4 and Tr6 turn the phase indicative of the minimum potential in the aforesaid three-phase supply voltage to an on-state.
More specifically, the transistor Tr1 becomes an on-state in the case where the potential of R-phase is the maximum, and an off-state in other cases. Likewise, the transistors Tr3 and Tr5 become an on-state in the case where the potential of S-phase and T-phase is the maximum, and an off-state in other cases, respectively. Further, the transistor Tr2 becomes an on-state in the case where the potential of R-phase is the minimum, and an off-state in other cases. Likewise, the transistors Tr4 and Tr6 become an on-state in the case where the potential of S-phase and T-phase is the minimum, and an off-state in other cases, respectively.
For example, the potential of R-phase becomes the maximum; on the other hand, the potential of S-phase becomes the minimum, between time t102 and time t103. For this reason, the transistors Tr1 and Tr4 become an on-state, and other transistors become an off-state. Likewise, the potential of R-phase becomes the maximum; on the other hand, the potential of T-phase becomes the minimum, between time t103 and time t104. For this reason, the transistors Tr1 and Tr6 become an on-state, and other transistors become an off-state.
In this case, the minimum voltage changes from the S-phase to the T-phase at the time t103, so that the transistor Tr4 becomes an off-state while the transistor Tr6 becomes an on-state with a delay of a short time .DELTA.t from time t103. Such a switching of an on/off state in a transistor is executed at each of time t101, t102, . . . , t109.
FIGS. 11 through 13 are circuit diagrams showing the flow of a conventional regenerative current; FIG. 11 shows the flow of the regenerative current before the phase is switched, FIG. 12 shows the flow of the regenerative current when the phase is switched, and FIG. 13 shows the flow of the regenerative current after the phase is switched. In other words, FIGS. 11 through 13 show the flow of the regenerative current between time t102 and time t103 in FIG. 10, the flow of the regenerative current at time t103 in FIG. 10, and the flow of the regenerative current between time t103 and time t104 in FIG. 10, respectively.
First, the circuit configuration of the converter shown in FIGS. 11 through 13 will be explained below. The transistors Tr1 and Tr2 are connected in series with each other. More specifically, an emitter terminal of the transistor Tr1 and a collector terminal of the transistor Tr2 are connected with each other, and this junction point is connected to the R-phase of a power source 11 through an inductance. Likewise, an emitter terminal of the transistor Tr3 and a collector terminal of the transistor Tr4 are connected with each other, and this junction point is connected to the S-phase of the

REFERENCES:
patent: 4251735 (1981-02-01), Coleman
patent: 4560908 (1985-12-01), Stupp et al.
patent: 4928052 (1990-05-01), Fujioka et al.

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