Power semiconductor module

Details Power semiconductor module Power semiconductor module

2001-12-31

2004-01-13

Patel, Rajnikant B. (Department: 2838)

Electric power conversion systems

Current conversion

Using semiconductor-type converter

C363S056020, C318S810000

Reexamination Certificate

active

06678180

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of Japanese application No. 2001-001169, filed Jan. 9, 2001, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power semiconductor module, typically utilized in a power conversion apparatus, such as an inverter or power supply, and more particularly the present invention relates to a power semiconductor device, such as an insulated-gate bipolar transistor or an intelligent power module, which incorporates a drive circuit in the same package.
2. Description of the Related Art
FIG. 6
is a block diagram showing an inverter for a pulse width modulation (“PWM” hereinafter) control apparatus, using an intelligent power module (“IPM” hereinafter).
In
FIG. 6
, IPM
30
includes a high voltage IC (integrated circuit) (hereinafter referred to as an HVIC)
31
, which is inputted with U-phase, V-phase, and W-phase PWM signals PWMU, PWMV, PWMW, and a PWMOFF signal, and generates driving signals for brake element
36
and inverter element
35
, which converts direct current (DC) power to alternating current (AC) power by using the above-mentioned driving signals to cause power semiconductor devices to perform switching.
Furthermore, IPM
30
is also provided with protective circuits for performing such functions as overcurrent protection, short-circuit protection, overheat protection, supply under-voltage protection, and accident diagnostic circuits for outputting a warning to the outside when a protective circuit operates. However, for the sake of expediency, these circuits have been omitted from FIG.
6
.
HVIC
31
, as will be described in detail below, includes: a signal generating circuit
32
, which is inputted with PWM signals PWMU, PWMV, PWMW, and a PWMOFF signal, and generates six PWM signals; a level shifting circuit
33
for converting the level of PWM signals for each insulated-gate bipolar transistor (hereinafter referred to as IGBT) of the three upper arms of inverter element
35
, for example, to signals that use a positive direct current potential as a reference; and a driving circuit
34
for generating and outputting driving signals (ON, OFF signals) at levels capable of driving each IGBT, based on the total of six PWM signals from the signal generating circuit
32
and level shifting circuit
33
.
Inverter element
35
includes a pair of switching arms
351
and
352
, each including an IGBT and a free wheeling diode connected in an inverse-parallel condition thereto, and connected in series top and bottom. The three-phase (U-phase, V-phase, W-phase) segments of inverter element
35
are connected in parallel, but for the sake of expediency, only the U-phase segment is shown in the example given in FIG.
6
.
Further, brake element
36
generates a damping force for applying a brake to a three-phase AC motor
80
, which is the load of inverter element
35
.
FIG. 6
also illustrates an AC power supply
70
, a converter
60
for performing AC/DC conversion, and a smoothing capacitor C, with terminals of the smoothing capacitor C being connected to the DC terminals P, N of inverter element
35
.
Further, three-phase AC motor
80
may be connected to output terminals U, V, W of each phase of the inverter element
35
.
Furthermore, the above-mentioned PWM signals PWMU, PWMV, PWMW and PWMOFF signal, and a brake input signal are inputted to HVIC
31
inside IPM
30
from a CPU
40
via an upstream-downstream insulating circuit
50
such as a photocoupler, with reference numeral
90
designating the power supply for IPM
30
, CPU
40
and insulating circuit
50
.
FIG. 7
shows the above-mentioned signal generating circuit
32
in more detail. Signal generating circuit
32
includes: inverting circuit
321
to which a PWMOFF signal is inputted; inverting circuits
322
U,
322
V,
322
W to which PWM signals PWMU, PWMV, PWMW are respectively inputted; dead-time generating circuits
323
U,
323
V,
323
W to which PWM signals PWMU, PWMV, PWMW and output signals of inverting circuits
322
U,
322
V,
322
W are respectively inputted; and AND circuits
324
U,
324
V,
324
W,
325
U,
325
V,
325
W, which are inputted with respective output signals from dead-time generating circuits
323
U,
323
V,
323
W and an output signal from inverting circuit
321
, and which output PWM signals to the IGBT of the upper and lower arms of each phase.
Regarding signal generating circuit
32
, the output signal of AND circuit
324
U makes up PWM signal PWMU for the IGBT of the upper arm of the U-phase, the output signal of AND circuit
325
U makes up PWM signal PWMX for the IGBT of the lower arm of the U-phase, the output signal of AND circuit
324
V makes up PWM signal PWMV for the IGBT of the upper arm of the V-phase, the output signal of AND circuit
325
V makes up PWM signal PWMY for the IGBT of the lower arm of the V-phase, the output signal of AND circuit
324
W makes up PWM signal PWMW for the IGBT of the upper arm of the W-phase, and the output signal of AND circuit
325
W makes up PWM signal PWMZ for the IGBT of the lower arm of the W-phase.
In signal generating circuit
32
of
FIG. 7
, for example, PWM signal PWMU and a signal that inverts the phase thereof 180° are inputted to U-phase dead-time generating circuit
323
U. Then, to prevent a short circuit due to simultaneously turning ON the IGBT of the upper and lower arms, dead time is created and outputted between the two input signals.
When the PWMOFF signal is not inputted (when the PWMOFF signal is at a “low” level), the output signals of dead-time generating circuit
323
U outputted via AND circuits
324
U and
325
U makes up, respectively, PWM signals PWMU and PWMX for the IGBT of the U-phase upper and lower arms as-is. Further, when the PWMOFF signal is inputted (when the PWMOFF signal is at a “high” level), there are no output signals from AND circuits
324
U and
325
U, and PWM signals PWMU, PWMX are OFF.
In addition, “Load Current Polarity Discrimination Method and Inverter System” disclosed in Japanese patent application laid-open publication no. 7-7967 (Jan. 10, 1995), discloses an attempt to compensate for dead time by determining the polarity of the motor current and correcting the PWM signal. This is because an error occurs between the inverter voltage that originally should have been outputted and the actual inverter output voltage due to the effect of dead time, and this error voltage distorts the motor current.
Thus, Japanese patent application laid-open publication no. 7-7967 relates to a dead-time compensation method for an inverter apparatus for converting DC to AC and supplying this AC to a load by using PWM signals to alternately turn upper and lower arm switching devices ON and OFF while interposing dead time that turns the upper and lower arm switching devices OFF simultaneously. Japanese patent application laid-open publication no. 7-7967 is directed to an inverter dead-time compensation method for detecting the existence of current flowing through the switching device of either the upper or lower arm, for determining the instantaneous polarity of a load current from the relationship between a specific current conducting direction and the existence of current in the pertinent switching device during the interval when this switching device is in the ON state, and, in accordance with this instantaneous polarity, increasing by a predetermined correction quantity the ON interval of a PWM signal for the arm of the one side from among the PWM signals outputted to the upper arm and lower arm, and, in addition, decreasing the PWM signal ON interval by the above-mentioned correction quantity for the arm of the other side.
In Japanese patent application laid-open publication no. 7-7967, an inverter apparatus for converting DC to AC and supplying this AC to load, includes a switching device, which is connected to a DC power source in the form of upper and lower arms, and which alternately turns ON and OFF, PWM signal generating means, and a driving circ

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