Power semiconductor module

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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Details

C257S691000

Reexamination Certificate

active

07994635

ABSTRACT:
To suppress warpage of a ceramic substrate, and to prevent a reduction in radiation efficiency.A power semiconductor module includes a module casing fitted with a radiator, and a common unit retained by the module casing. The common unit has: a ceramic substrate having a circuit surface disposed with a semiconductor element, and a radiation surface brought into abutting contact with the radiator; and a package formed by exposing the radiation surface and sealing the circuit surface with heat resistant resin. The circuit surface and the radiation surface are respectively formed of metal layers51formed on the ceramic substrate, and the metal layer51forming the radiation surface has: by forming a buffer pattern512including a groove part extending along a circumferential part thereof, a radiation pattern510formed on an inner side of the buffer pattern512; and an outer peripheral pattern511formed on an outer side of the buffer pattern512. Such a configuration enables warpage of the ceramic substrate to be suppressed, and a reduction in radiation efficiency to be prevented.

REFERENCES:
patent: 5536972 (1996-07-01), Kato
patent: 6166904 (2000-12-01), Kitahara et al.
patent: 7081670 (2006-07-01), Shibuya et al.
patent: 2008/0074829 (2008-03-01), Kashiwazaki
patent: 09-237869 (1997-09-01), None
patent: 10-84059 (1998-03-01), None
patent: 2001-36005 (2001-02-01), None
patent: 2003-031765 (2003-01-01), None
patent: 2006-140401 (2006-06-01), None
patent: 2006-332291 (2006-12-01), None
International Search Report mailed on Aug. 21, 2007.

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