Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2002-11-15
2003-12-30
Cuneo, Kamand (Department: 2829)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S328000, C257S329000, C257S339000
Reexamination Certificate
active
06670658
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-060480, filed Mar. 6, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a power semiconductor element including a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) used in a power inverter and a method of fabricating the same, particularly, to an element structure capable of improving the short circuit withstand capability and a method of fabricating the same. The present invention is applied to, for example, an IGBT (Insulated Gate Bipolar Transistor) a power MOSFET, a MCT (MOS Controlled Thyristor), and an IEGT (Injection Enhanced Gate Transistor).
In recent years, the power source apparatus used in the field of the power electronics is required to be miniaturized and to exhibit a high performance. Therefore, in the power semiconductor element (switching element), vigorous efforts are being made in an attempt to improve the performance of the power source apparatus in respect of the improvements in the breakdown voltage, in the adaptability for the large current, in the reduction of the loss, in the withstand capability to the breakdown, and in the operating speed. Particularly, a power IBGT excellent in the breakdown voltage and in the adaptability for the large current and capable of obtaining an ON-voltage lower than that of the power MOSFET is widely used as a power semiconductor element having a breakdown voltage not lower than about 300 V.
The power IGBT is an element that is driven by a MOS gate. Widely known to the art are two kinds of the power IGBT, i.e., a power IGBT of a planar structure, in which a MOS gate is formed in the shape of a flat plate, and a power IGBT of a trench structure, in which the MOS gate is buried inside a trench.
The trench IGBT has a trench-gate structure in which a large number of trench IGBT cells each including a channel region formed of the trench side wall are arranged on a semiconductor substrate. In general, the trench IGBT is said to be advantageous over the planar IGBT in that the trench IGBT permits easily improving the performance (or permits decreasing the loss) by the reduction of the channel resistance. The construction of the trench IGBT will now be described with reference to
FIG. 1A
, which is a cross sectional view schematically showing the construction of a conventional trench IGBT.
As shown in
FIG. 1A
, an n+-type buffer layer
11
, an n-type base layer
12
, and a p-type base layer
13
are formed in the order mentioned on a p+-type collector layer
10
. Also, an n+-type emitter layer
14
is in a part of the surface region of the p-type base layer
13
. Also formed is a trench
15
extending downward from the surface of the emitter layer
14
to reach the n-type base layer
12
through the emitter layer
14
and the p-type base layer
13
. A gate electrode
17
(trench-gate electrode), which is covered with a gate insulating film
16
, is buried in the trench
15
. The trench-gate electrode
17
is withdrawn to reach, for example, a pad (not shown) for the gate electrode for contact with the outside.
An emitter electrode
18
is formed to cover the emitter layer
14
and the p-type base layer
13
. The emitter layer
14
and the p-type base layer
13
are electrically short-circuited by the emitter electrode
18
. Also, an insulating film
19
is formed on the trench-gate electrode
17
. The trench-gate electrode
17
and the emitter electrode
18
, are electrically isolated from each other by the insulating film
19
. Also, a collector electrode
20
is formed on the back surface of the collector region
10
.
A MOSFET is formed of the n
−
-type base layer
12
, the p-type base layer
13
, the emitter layer
14
, the gate insulating film
16
and the trench-gate electrode
17
. It should be noted that electrons are injected from the emitter layer
14
into the n
−
-type base layer
12
through a channel region CH formed in that region of the p-type base layer
13
which is in contact with the trench
15
.
FIG. 1B
is a graph relating to an impurity concentration profile along the line X
1
-X
2
shown in FIG.
1
A and shows the impurity concentration distribution in the active area including the channel region CH. As shown in the drawing, the profile includes the n-type impurity concentration distribution
30
in the emitter layer
14
, the p-type impurity concentration distribution
31
in the p-type base layer
13
, and the n-type impurity concentration distribution
32
in the n
−
-type base layer
12
. The p-type impurity concentration in the p-type base layer
13
is increased to reach the highest concentration Cp
0
in the position close to the junction between the emitter layer
14
and the p-type base layer
13
, and the p-type impurity concentration is gradually lowered toward the n
−
-type base layer
12
.
The fabricating process of the trench IGBT shown in
FIG. 1A
will now be described briefly. In the first step, the p-type base layer
13
is formed by diffusion in a surface region of the n
−
-type base layer
12
formed on the collector region
10
with an n-type buffer layer
11
formed therebetween. Then, a large number of n-type emitter layers
14
having a stripe pattern when viewed from above are formed in a surface region of the p-type base layer
13
. As a result, the exposed portion of the p-type base layer
13
is allowed to have a large number of stripe pattern as viewed from above.
Then, the trench
15
having a stripe pattern as viewed from above are formed in each of the emitter layers
14
in a manner to extend to reach the n-type base layer
12
. In other words, the trench
15
is formed to extend through the emitter layer
14
and the p-type base layer
13
. After formation of the trench
15
, the gate insulating film
16
such as a SiO
2
film is formed to cover the inner wall of the trench
15
and the upper surfaces of the emitter layer
14
and the p-type base layer
13
.
In the next step, a polycrystalline silicon (polysilicon) film
17
containing P (phosphorus) is formed by a CVD (Chemical Vapor Deposition) method within the trench
15
and on the surfaces of the emitter layer
14
and the p-type base layer
13
. The polysilicon film
17
is for formation of the trench-gate electrode.
Then, the polysilicon film
17
is patterned on the basis of the trench gate lead pattern so as to form a pad (not shown) for contact of the gate electrode. Also, the upper surface of the polysilicon film
17
within the trench
15
is etched back so as to permit the upper surface of the gate electrode
17
to be flush with the upper surfaces of the emitter layer
14
and the p-type base layer
13
.
Then, an insulating film
19
is deposited on the upper surfaces of the trench
15
, the emitter layer
14
and the p-type base layer
13
, followed by forming a large contact hole for the lead of the gate electrode in the insulating film
19
formed on the pad for contact of the gate electrode. Also formed is a contact hole for the lead of the emitter-base in a manner to extend through the insulating film
19
around the opening of the trench
15
and through the gate insulating film
16
positioned below the insulating film
19
.
Further, a metal wiring layer such as an aluminum wiring layer is formed by a sputtering method within the contact holes and on the insulating film
19
for the lead of the gate electrode and for the lead of the emitter-base, followed by patterning the metal wiring layer as desired so as to form an emitter electrode
18
and a gate electrode wiring (not shown). Still further, a collector electrode
20
is formed on the back surface of the collector layer
10
, thereby forming the trench IGBT.
The operation of the trench IGBT shown in
FIG. 1A
will now be described.
When the IGBT is turned on, a collector voltage VCE is applied between the collector electrode
20
and the emitter electro
Hattori Hidetaka
Yamaguchi Masakazu
Cuneo Kamand
Sarkar Asok Kumar
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