Power semiconductor component in the planar technique

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With means to increase breakdown voltage

Reexamination Certificate

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C257S502000

Reexamination Certificate

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07030426

ABSTRACT:
In a power semiconductor component produced in a planar technique, a near-surface structure having at least one depression is formed in a surface region of an edge termination adjacent a main surface of the semiconductor body. The structure lies inside a space charge region formed when a voltage is applied at a junction between semiconductor regions of opposite conduction type. Dielectric material may fill the depression and form a passivation layer on the surface region. The depression may be an annular trench having a width to depth ratio ≦1. Alternatively, the structure may be waffle-shaped with multiple depressions.

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