Power saving PLL circuit

Details Power saving PLL circuit Power saving PLL circuit

1996-11-27

1998-07-21

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 1A, 331 8, 331 16, 331 25, 327157, 327159, 455260, H03L 7089, H03L 718

Patent

active

057839727

ABSTRACT:
A phase lock loop includes a voltage controlled oscillator (VCO), a phase comparator for comparing the phases of the output of the VCO and a reference signal, a charge pump circuit, including a plurality of current sources, for supplying a control voltage by charging or discharging a capacitor based on the outputs of the current sources, and a current source controller for controlling the current output of the current sources by a n-bit current control signal. Charge current and discharge current by the charge pump circuit are controlled in n bits so that a rapid synchronization during lock-in and a low jitter after lock-in can be obtained.

REFERENCES:
patent: 4885552 (1989-12-01), Boudewijns
patent: 5233314 (1993-08-01), McDermott et al.
patent: 5362990 (1994-11-01), Alvarez et al.
patent: 5386437 (1995-01-01), Yasuda
Patent Abstracts of Japan, vol. 018, No. 340 (E-1569), 27 Jun. 1994 & JP 06 085664 A (NEC IC Microcomput Syst Ltd), 25 Mar. 1994, *abstract*.

Affiliated with

Also associated with

Rating

Power saving PLL circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power saving PLL circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power saving PLL circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1650106