Power-saving decoder for memories

Details Power-saving decoder for memories Power-saving decoder for memories

1982-08-19

1984-09-11

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307449, 307481, 307482, H03K 19094, H03K 1920

Patent

active

044712405

ABSTRACT:
A decoder for memories improves speed and reduces power consumption by gating the power to a parallel decoder to provide a signal to a bootstrap circuit for providing an enable signal at essentially the voltage present at a positive power supply terminal.

REFERENCES:
patent: 3825888 (1974-07-01), Kawagoe
patent: 3959781 (1976-05-01), Mehta et al.
patent: 4048629 (1977-09-01), Bormann
patent: 4185320 (1980-01-01), Takemae et al.
patent: 4262828 (1981-04-01), Perlegos et al.
patent: 4275312 (1981-06-01), Saitou et al.
Hsich et al., "MOSFET Storage Array Addressing System", IBM Tech. Disc. Bull., vol. 13, No. 8, Jan. 1971, pp. 2383-2384.

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