Power on reset circuit capable of generating power on reset sign

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Patent

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Details

327143, 327198, H03L 700

Patent

active

060160683

ABSTRACT:
A power on reset circuit includes: interconnected first and second inverter circuits; a capacitor connected to an input node of the first inverter circuit; and a buffer circuit responsive to voltage at an output node for generating a power on reset signal. In the power on reset circuit, in order to increase source voltage of an N channel MOS transistor in the second inverter circuit to a voltage higher than ground voltage, a diode-connected transistor is inserted between the source of the transistor and a ground node. Thus, the power on reset circuit never fails to produce the power on reset signal even when power supply voltage is dropped.

REFERENCES:
patent: 4196362 (1980-04-01), Maehashi
patent: 5374923 (1994-12-01), Sakamoto
patent: 5442312 (1995-08-01), Walter
patent: 5546045 (1996-08-01), Sauer
patent: 5570050 (1996-10-01), Conary
patent: 5646563 (1997-07-01), Kuo

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