Power-on reset circuit

Details Power-on reset circuit Power-on reset circuit

1989-03-06

1989-12-05

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307594, 3072965, H03K 1722, H03K 1720, H03K 17687, H03K 5153

Patent

active

048854760

ABSTRACT:
A power-on reset circuit includes a start-up voltage generator circuit which produces a voltage which is insensitive to changes in the threshold voltages of the field effect transistors contained therein. The start-up voltage then controls a trigger voltage for sheering a current to a capacitor, the current being provided by a switchable current source. The capacitor charges, therein introducing a delay into the generation of the reset signal. The reset signal is fedback to the start-up voltage generator circuit to reduce the steady state current drawn by the power-on reset circuit. A test terminal is provided to force the reset signal to go low for in circuit testing. This also provides a means for resetting internal memory elements which may be couple to the output of the power-on reset circuit to a known state.

REFERENCES:
patent: 4591745 (1986-05-01), Shen
patent: 4698531 (1987-10-01), Jones
patent: 4717840 (1988-01-01), Ouyang et al.
patent: 4812679 (1989-03-01), Mahabadi

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