Power on and low voltage reset circuit

Details Power on and low voltage reset circuit Power on and low voltage reset circuit

1979-05-01

1981-10-20

Anagnos, Larry N.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307594, 307597, 320 48, 340636, H03K 5153, H03K 524, H03K 17687, H02J 1300

Patent

active

042963389

ABSTRACT:
An NMOS power on/low voltage reset circuit provides a substantially instantaneous reset enabling signal when a predetermined fraction of the power supply voltage falls below a predetermined reference voltage. In addition, an external capacitor is discharged. A second reset enabling signal is extended until the capacitor is again charged to a predetermined voltage thus allowing the clock oscillators of a microcomputer sufficient time to stabilize. Self test means are also provided. The reset circuit is implemented on the microcomputer chip.

REFERENCES:
patent: 3852732 (1974-12-01), Yorksie et al.
patent: 3877001 (1975-04-01), Bogut et al.
patent: 3894247 (1975-07-01), De Jong
patent: 3895239 (1975-07-01), Alaspa
patent: 3950654 (1976-04-01), Broedner et al.
patent: 4045688 (1977-08-01), Stewart
patent: 4052717 (1977-10-01), Arnold et al.
patent: 4103187 (1978-07-01), Imamura
patent: 4163193 (1979-07-01), Kamiya
patent: 4219999 (1980-09-01), Ichikawa et al.
patent: 4224539 (1980-09-01), Musa et al.
Hanchett, "Turn-On Reset Pulse Circuits"; RCA Technical Notes, TN No. 927, 4 pp., 3/28/73.

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