Power network stacked via removal for congestion reduction

Details Power network stacked via removal for congestion reduction Power network stacked via removal for congestion reduction

2011-07-19

2011-07-19

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Reexamination Certificate

active

07984397

ABSTRACT:
A method of automatically reducing stacked vias while minimizing voltage drop in a power network of an integrated circuit (IC) is provided. In this method, any feasible (i.e. other than connectivity-necessary and uncongested stacked vias) stacked vias of the power network can be virtually removed. If a target voltage drop of the power network is exceeded, then a measurement of the severity of at least a maximum voltage drop on the IC can be updated. After this updating, a set of voltage drop improvement stacked vias can be virtually returned to the power network. The steps of determining whether the target voltage drop is exceeded, updating the severity of the voltage drop at one or more hot spots, and virtually returning the set of additional stacked vias can be repeated until the target voltage drop is not exceeded.

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