Power-mixer architecture for a transmitter

Details Power-mixer architecture for a transmitter Power-mixer architecture for a transmitter

2001-04-09

2004-10-12

Corsaro, Nick (Department: 2681)

Telecommunications

Transmitter

Frequency conversion

C455S091000, C455S084000

Reexamination Certificate

active

06804499

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to transmitters. The present invention specifically relates to architecture of a power-mixer.
2. Description of the Related Art
In prior art up-converter transmitter architectures, the mixer is driven in a voltage mode of operation and is coupled to an output driver. Generally, achieving the higher output power requires driving the mixer harder, which moves the mixer into a non-linear operating range. Additionally, in order to maximize the power efficiency, the mixer needs to be impedance matched with the output driver. The impedance matching requires an off-chip inductor. The impedance matching also increases pin count of the transmitter.
What is therefore needed is an improved technique for generating medium linear power in a transmitter chip at relatively good efficiency and without utilizing on-chip impedance matching inductors.
SUMMARY OF THE INVENTION
The present invention relates to a power mixer architecture for a transmitter chip. Various aspects of the invention are novel, non-obvious, and provide various advantages. While the actual nature of the present invention covered herein can only be determined with reference to the claims appended hereto, certain features, which are characteristic of the embodiments disclosed herein, are described briefly as follows.
One form of the present invention is a mixing stage of a transmitter chip comprising a lower tree and an upper tree. The lower tree is operable provide a current intermediate frequency signal in response to a reception of a second current intermediate frequency signal and a current biasing signal. The upper tree operable to provide a voltage radio frequency signal in response to the current intermediate frequency signal.
A second form of the present invention is a mixing stage of a transmitter chip comprising an upper tree including a switching circuit and a lower tree including a current amplifier. The current amplifier is operable to turn on the switching circuit in response to a reception of a current intermediate frequency signal and a current biasing signal.
A third form of the present invention is a transmitter chip comprising a biasing stage, a phase shifting stage, a local oscillator driver stage, and a mixing stage. The biasing stage is operable to provide a plurality of current biasing signals to the mixing stage. The phase shifting stage is operable to provide a plurality of current intermediate frequency signals to the mixing stage. The local oscillator driver stage is operable to provide a plurality of voltage local oscillating signals to the mixing stage. The mixing stage is operable to provide a first voltage radio frequency signal and a second voltage radio frequency signal in response to a reception of the current biasing signals, the current intermediate frequency signals, and the voltage local oscillating signals.
The foregoing forms and other forms, features and advantages of the present invention will become further apparent from the following detailed description of the presently preferred embodiments, read in conjunction with the accompanying drawings. The detailed description and drawings are merely illustrative of the present invention rather than limiting, the scope of the present invention being defined by the appended claims and equivalents thereof.


REFERENCES:
patent: 5196742 (1993-03-01), McDonald
patent: 197 54 114 (1998-11-01), None
patent: 0 565 299 (1993-03-01), None
An article entitled, “A Low Distortion Bipolar Mixer for Low Voltage Direct Up-Conversion and High IF Systems”, (Authors, Farbod Behbahani, Ali Fotowat, Saeed Navid, Rainer Gaethke, and Michael Delurio, IEEE Journal of Solid-State Circuits, vol. 32, No. 9, Dated Sep. 1997, pp. 1446-1450).

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