Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With waveguide or long line
Reexamination Certificate
2001-06-26
2003-12-02
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With waveguide or long line
C324S1540PB
Reexamination Certificate
active
06657425
ABSTRACT:
TECHNICAL FIELD
The present invention relates to monitoring circuitry, and more specifically, to an improved technique of monitoring power delivered by power amplifiers, transistors and the like, when used in specific applications such as wireless communications.
BACKGROUND OF THE INVENTION
Solid state power devices are utilized in a variety of applications including wireless signal generation. In such applications, it is necessary and/or desirable to ascertain the amount of power being output by the particular device.
FIG. 1
shows an exemplary prior art circuit arrangement for measuring power delivered to a load
101
by a radio frequency (RF) signal input through capacitor
102
. The actual chip is shown as enclosed by outline
103
, with capacitor
102
, circuitry
104
, and transistors Q
1
and Q
2
“on chip”. Bonding pads
110
through
112
represent the interface from the actual chip to the pin when transmitting the signal off chip. Inductor
114
represents a ground inductance, and inductors
115
and
116
represent inherent inductors such as inductance caused by the wire bond as well as the lead frame inductance of a chip package.
Typically, the load
101
is driven by the RF signal
130
through an off chip-matching network
132
. In order to measure the power being delivered to the load, several techniques are available. Some involve constructing a voltage divider circuit and then measuring a fraction of the signal applied to the load. Others utilize an off chip averaging circuit. Plural other techniques exist as well.
The arrangement of
FIG. 1
describes one prior art technique for measuring the power delivered to the load. More specifically, transistor Q
2
is selected at a value much smaller than transistor Q
1
, such that the current through transistor Q
2
is only 1% or less of that through Q
1
. An averaging circuit includes resistor
140
and capacitor
142
.
FIG. 2
shows a graph of the voltage at the point V
detect
in
FIG. 1
, as a function of the power delivered by the device. Notably, at approximately 1.8 watts, the slope of the curve in
FIG. 2
becomes positive. This change in slope is due to several factors. One reason for the change in slope can be appreciated from a review of
FIG. 3
, a close up of transistor Q
2
showing the inherent base collector diode
301
and the substrate collector diode
302
. Both of these diodes are inherent in the device and are result of the physics of fabrication. However, at high power levels, these diodes become forward biased and introduce extra current paths into the collector of Q
2
. Accordingly, the current being measured and shown as i_sense in
FIG. 1
is no longer an accurate measure of the power being delivered by the device. Instead, the measured signal is distorted because the high voltage variations at relatively high power cause additional current paths into the collector of Q
2
. Additionally, the coupling between inductors
115
and
116
causes further errors in the current i_sense. As a result, the measurement system shown in
FIG. 1
only works for lower power signals, but does not operate properly at higher powers.
In view of the above, there exists a need in the art for an improved technique of providing current and power measurement in devices at high output power levels. This issue is particularly important in wireless communications devices, where circuitry similar to that shown in
FIG. 1
is used.
It is an object of the invention to provide such power measurement in a manner that does not require the use of large components and bulky, lossy devices.
SUMMARY OF THE INVENTION
The above and other problems of the prior art are overcome in accordance with the present invention. A measurement transistor Q
2
is connected in parallel with the power transistor Q
1
. A shorting device is connected in parallel with the measurement transistor in order to short signals to ground, but only signals that are substantially the same as the frequency of an input RF signal. In a preferred embodiment, the shorting device is an inductor/capacitor (LC) resonant circuit.
In accordance with the invention, high frequency signals, which would vary greatly in voltage and cause the additional current paths discussed above are shorted to ground. By utilizing a resonant circuit, use of a large capacitor is avoided, yet the desired impedance in the shorting device is achieved.
In an additional preferred embodiment, the capacitor for the shorting device is constructed on chip, and the inductor portion of the LC resonant circuit comprises inherent inductance in a chip-bonding pad.
REFERENCES:
patent: 4868613 (1989-09-01), Hirachi
patent: 5019782 (1991-05-01), Schatter
patent: 5347229 (1994-09-01), Suckling et al.
patent: 5397913 (1995-03-01), Takata et al.
patent: 6054898 (2000-04-01), Okuma et al.
patent: 6348818 (2002-02-01), Filipovski
Luo Sifen
Sowlati Tirdad
Biren Steven R.
Cuneo Kamand
Koninklijke Philips Electronics , N.V.
Nguyen Tung X.
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